Manufacturing method of semiconductor device

Patent metadata

Field	Value
Publication number	US-9287407-B2
Application number	US-201213484670-A
Country	US
Kind code	B2
Filing date	May 31, 2012
Priority date	Jun 10, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a gate electrode layer over an oxide semiconductor film with a gate insulating film therebetween;
introducing argon into portions of the oxide semiconductor film by ion implantation or ion doping using at least the gate electrode layer as a mask;
forming a titanium nitride film over the gate electrode layer so as to contact the oxide semiconductor film; and
heating the titanium nitride film to form low-resistance regions in the oxide semiconductor film,
wherein the low-resistance regions contain argon and titanium.

2. The method according to claim 1 , wherein the argon is introduced into the portions of the oxide semiconductor film through the titanium nitride film.

3. The method according to claim 1 , wherein the oxide semiconductor film comprises indium.

4. The method according to claim 1 , wherein the oxide semiconductor film comprises indium, gallium and zinc.

5. The method according to claim 1 , wherein the argon is introduced by ion implantation.

6. A method for manufacturing a semiconductor device, comprising the steps of:
forming a gate electrode layer over an oxide semiconductor film with a gate insulating film therebetween;
introducing argon into portions of the oxide semiconductor film by ion implantation or ion doping using at least the gate electrode layer as a mask;
forming side wall insulators on side surfaces of the gate electrode layer;
forming a titanium nitride film over the gate electrode layer and the side wall insulators so as to contact the oxide semiconductor film; and
heating the titanium nitride film to form low-resistance regions in the oxide semiconductor film,
wherein the low-resistance regions contain argon and titanium.

7. The method according to claim 6 , wherein the argon is introduced into the portions of the oxide semiconductor film through the titanium nitride film.

8. The method according to claim 6 , wherein the oxide semiconductor film comprises indium.

9. The method according to claim 6 , wherein the oxide semiconductor film comprises indium, gallium and zinc.

10. The method according to claim 6 , wherein the argon is introduced before forming the side wall insulators.

11. The method according to claim 6 , wherein the argon is introduced after forming the side wall insulators.

Assignees

• Koezuka Junichi
• Ohno Shinji
• Sato Yuichi
• Yamazaki Shunpei
• Semiconductor Energy Lab

Inventors

• Koezuka Junichi
• Ohno Shinji
• Sato Yuichi
• Yamazaki Shunpei

Classifications

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/031

  of thin-film transistors [TFT] · CPC title