Thin film transistor array substrate for digital photo-detector

US9287315B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9287315-B2
Application numberUS-201314086034-A
CountryUS
Kind codeB2
Filing dateNov 21, 2013
Priority dateNov 27, 2012
Publication dateMar 15, 2016
Grant dateMar 15, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A thin film transistor array substrate for a digital photo-detector is provided. The photo-detector includes a plurality of gate lines to supply a scan signal; a plurality of data lines to output data, the data lines arranged in a direction crossing the gate lines, wherein cell regions are defined by the gate lines and the data lines; a photodiode in each of the cell regions to perform photoelectric conversion; a thin film transistor at each intersection between the gate lines and the data lines to output a photoelectric conversion signal from the photodiode to the data lines in response to a scan signal supplied by the gate lines; and a light-shielding layer over each channel region of the respective thin film transistors. Each light-shielding layer is electrically connected to the respective gate line.

First claim

Opening claim text (preview).

What is claimed is: 1. A thin film transistor array substrate for a digital photo-detector, comprising: a plurality of gate lines to supply a scan signal; a plurality of data lines to output data, the data lines arranged in a direction crossing the gate lines, wherein cell regions are defined by the gate lines and the data lines; a photodiode in each of the cell regions to perform photoelectric conversion; a thin film transistor at each intersection between the gate lines and the data lines to output a photoelectric conversion signal from the photodiode to the data lines in response to a scan signal supplied by the gate lines; and a light-shielding layer over each channel region of the respective thin film transistors, each light-shielding layer electrically connected to the respective gate line, wherein the photodiode includes, in order, a first electrode, a semiconductor layer, and a second electrode; and wherein the light-shielding layer includes the same material as the first electrode of the photodiode. 2. The thin film transistor array substrate according to claim 1 , further comprising a plurality of bias lines to apply a bias voltage to respective photodiodes, wherein corresponding data lines and bias lines are formed parallel to each other at both sides of each respective photodiode. 3. The thin film transistor array substrate according to claim 1 , further comprising a plurality of bias lines to apply a bias voltage to respective photodiodes, the light-shielding layer being formed of the same material as the data lines and the bias lines. 4. The thin film transistor array substrate according to claim 1 , wherein the photodiode is configured to detect X-rays. 5. The thin film transistor array substrate according to claim 1 , wherein the photodiode includes a PIN diode for detecting X-rays. 6. A thin film transistor array substrate for a digital photo-detector, comprising: a substrate, a thin film transistor disposed on the substrate, the thin film transistor including a gate electrode, a source electrode, and a drain electrode; a first interlayer insulating film disposed over the substrate and the thin film transistor, the first interlayer insulating film defining a source contact hole on the source electrode; a first electrode of a photodiode on the interlayer insulating film such that the first electrode is connected to the source electrode through the source contact hole; a semiconductor layer of the photodiode disposed on the first electrode; a second electrode of the photodiode disposed on the semiconductor layer; a second interlayer insulating film disposed on the first interlayer insulating film and the second electrode of the photodiode, a gate contact hole being defined through the first and second interlayer insulating films over the gate line; and a light-shielding layer disposed on the second interlayer insulating film over a channel region of the thin film transistor such that the light-shielding layer is connected to the gate line through the gate contact hole. 7. The thin film transistor array substrate according to claim 6 , wherein the gate electrode protrudes from a gate line. 8. The thin film transistor array substrate according to claim 6 , further comprising a data line to output data, and a bias line to apply a bias voltage to the photodiode, wherein the light-shielding layer is formed of the same material as the data lines and the bias lines. 9. The thin film transistor array substrate according to claim 6 , further comprising: a drain contact hole defined through the first and second interlayer insulating films over the drain electrode; a bias-line contact hole defined through the second interlayer insulating film over the second electrode; a data line on the second interlayer insulating film such that the data line is connected through the drain contact hole to the drain electrode; and a bias line on the second interlayer insulating film such that the bias line is connected to the second electrode through the bias-line contact hole. 10. The thin film transistor array substrate according to claim 6 , further comprising a data line to output data, and a bias line to apply a bias voltage to the photodiode, wherein the data line and the bias lines are formed parallel to each other at respective sides of the photodiode. 11. The thin film transistor array substrate according to claim 6 , wherein the photodiode is configured to detect X-rays. 12. The thin film transistor array substrate according to claim 6 , wherein the photodiode includes a PIN diode for detecting X-rays. 13. A thin film transistor array substrate for a digital photo-detector, comprising: a substrate; a thin film transistor on the substrate, the thin film transistor including a gate electrode, a source electrode, and a drain electrode; a first interlayer insulating film disposed over the substrate and the thin film transistor, the first interlayer insulating film defining a source contact hole on the source electrode and defining a gate contact hole on the gate line; a first electrode of a photodiode disposed on the interlayer insulating film such that the first electrode is connected to the source electrode through the source contact hole; a light-shielding layer on the first interlayer insulating film over a channel region of the thin film transistor such that the light-shielding layer is connected to the gate line through the gate contact hole; a semiconductor layer of the photodiode disposed on the first electrode; a second electrode of the photodiode disposed on the semiconductor layer; and a second interlayer insulating film disposed on the first interlayer insulating film, the light-shielding layer, and the second electrode of the photodiode. 14. The thin film transistor array substrate according to claim 13 , wherein the gate electrode protrudes from a gate line. 15. The thin film transistor array substrate according to claim 13 , wherein the light-shielding layer is formed of the same material as the first electrode of the photodiode. 16. The thin film transistor array substrate according to claim 13 , further comprising: a drain contact hole defined through the first and second interlayer insulating films over the drain electrode; a bias-line contact hole defined through the second interlayer insulating film over the second electrode; a data line on the second interlayer insulating film such that the data line is connected through the drain contact hole to the drain electrode; and a bias line on the second interlayer insulating film such that the bias line is connected to the second electrode through the bias-line contact hole. 17. The thin film transistor array substrate according to claim 13 , further comprising a data line to output data, and a bias line to apply a bias voltage to the photodiode, wherein the data line and the bias lines are formed parallel to each other at respective sides of the photodiode. 18. The thin film transistor array substrate according to claim 13 , wherein the photodiode is configured to detect X-rays. 19. The thin film transistor array substrate according to claim 13 , wherein the photodiode includes a PIN diode for detecting X-rays.

Assignees

Inventors

Classifications

  • the devices being sensitive to radiation having very short wavelengths, e.g. X-rays, gamma-rays or corpuscular radiation · CPC title

  • the devices being sensitive to very short wavelength, e.g. being sensitive to X-rays, gamma-rays or corpuscular radiation · CPC title

  • H10F39/189Primary

    X-ray, gamma-ray or corpuscular radiation imagers · CPC title

  • H10D89/00Primary

    Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00 · CPC title

  • H10F39/802Primary

    Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9287315B2 cover?
A thin film transistor array substrate for a digital photo-detector is provided. The photo-detector includes a plurality of gate lines to supply a scan signal; a plurality of data lines to output data, the data lines arranged in a direction crossing the gate lines, wherein cell regions are defined by the gate lines and the data lines; a photodiode in each of the cell regions to perform photoele…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10F39/189. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).