Hermetically sealed wafer packages

US9287237B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9287237-B2
Application numberUS-201514640219-A
CountryUS
Kind codeB2
Filing dateMar 6, 2015
Priority dateJun 20, 2011
Publication dateMar 15, 2016
Grant dateMar 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Hermetically sealed semiconductor wafer packages that include a first bond ring on a first wafer facing a complementary surface of a second bond ring on a second wafer. The package includes first and second standoffs of a first material, having a first thickness, formed on a surface of the first bond ring. The package also includes a eutectic alloy (does not have to be eutectic, typically it will be an alloy not specific to the eutectic ratio of the elements) formed from a second material and the first material to create a hermetic seal between the first and second wafer, the eutectic alloy formed by heating the first and second wafers to a temperature above a reflow temperature of the second material and below a reflow temperature of the first material, wherein the eutectic alloy fills a volume between the first and second standoffs and the first and second bond rings, and wherein the standoffs maintain a prespecified distance between the first bond ring and the second bond ring.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for bonding together two semiconductor wafers, the method comprising: forming a first bond ring on a first wafer; forming a second bond ring on a second wafer, wherein a surface of the second bond ring faces a complementary surface of the first bond ring; forming first and second standoffs of a first material, having a first thickness, on the surface of the first bond ring; forming a layer of a second material, having a second thickness, between the first and second standoffs on the surface of the first bond ring or the second bond ring; and forming a eutectic alloy from the second and the first material to create a hermetic seal between the first and second wafers, the eutectic alloy formed by heating the first and second wafers to a temperature above a reflow temperature of the second material, causing the second material to reflow and create a hermetic seal between the first bond ring and the second bond ring, wherein the first and second standoffs maintain a pre-specified distance between the first bond ring and the second bond ring. 2. The method of claim 1 , comprising applying pressure to the first and second wafers to bring the first and second wafers together before or after heating the first and second wafers. 3. The method of claim 1 , comprising depositing a layer of a third material over the layer of a second material to reduce oxidation of the layer of a second material. 4. The method of claim 1 , wherein prior to heating the first and second materials, a gap is created between the first and second standoffs and the second bond ring when the second wafer is positioned over the first wafer. 5. The method of claim 1 , wherein a first bond ring geometry is the same as a second bond ring geometry. 6. The method of claim 1 , comprising forming the second layer of the second material with a volume of the second material that is greater than a cavity defined by the first and second standoffs and the first and second bond rings. 7. The method of claim 1 , comprising forming the second layer of the second material with a volume of the second material that is less than a cavity defined by the first and second standoffs and the first and second bond rings. 8. The method of claim 1 , comprising cooling the first and second wafers below the reflow temperature of the second material to solidify the hermetic seal. 9. A hermetically sealed semiconductor wafer package, the package comprising: a first bond ring on a first wafer; a second bond ring on a second wafer, wherein a surface of the second bond ring faces a complementary surface of the first bond ring; first and second standoffs of a first material, having a first thickness, formed on the surface of the first bond ring; and a eutectic alloy formed between the first and second standoffs and the first and second bond rings from a second material and the first material to create a hermetic seal between the first and second wafers, the eutectic alloy formed by heating the first and second materials to a temperature above a reflow temperature of the second material. 10. The package of claim 9 , wherein prior to heating the first and second materials, a gap is created between the first and second standoffs and the second bond ring when the second wafer is positioned over the first wafer. 11. The package of claim 9 , wherein a first bond ring geometry is the same as a second bond ring geometry. 12. A method of bonding together two semiconductor wafers, the method comprising: forming a first bond ring on a surface of a first wafer; forming a second bond ring on a surface of a second wafer, wherein a surface of the second bond ring faces a complementary surface of the first bond ring; forming first and second standoffs of a same first material, each having a same first thickness, on the first bond ring surface; forming a layer of a second material, having a second thickness, between the first and second standoffs on the surface of the first bond ring or the surface of the second bond ring; heating the first and second wafers to a temperature above a reflow temperature of the second material, causing the second material to reflow, and forming a eutectic alloy comprising the first and second materials and creating a hermetic seal between the first and second bond rings; and annealing the first and second materials, causing the first material to diffuse into the second material, wherein the first and second standoffs maintain a pre-specified distance between the first and second bond rings.

Assignees

Inventors

Classifications

  • batch processes · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

  • Plan-view shape, i.e. in top view · CPC title

  • Shapes of bond pads · CPC title

  • Bond pads specially adapted therefor · CPC title

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Frequently asked questions

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What does patent US9287237B2 cover?
Hermetically sealed semiconductor wafer packages that include a first bond ring on a first wafer facing a complementary surface of a second bond ring on a second wafer. The package includes first and second standoffs of a first material, having a first thickness, formed on a surface of the first bond ring. The package also includes a eutectic alloy (does not have to be eutectic, typically it wi…
Who is the assignee on this patent?
Raytheon Co
What technology area does this patent fall under?
Primary CPC classification H10W90/732. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).