Apparatus and methods for reducing impact of high RF loss plating

Patent metadata

Field	Value
Publication number	US-9287226-B2
Application number	US-201414538265-A
Country	US
Kind code	B2
Filing date	Nov 11, 2014
Priority date	Mar 3, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

To reduce the radio frequency (RF) losses associated with high RF loss plating, such as, for example, Nickel/Palladium/Gold (Ni/Pd/Au) plating, an on-die passive device, such as a capacitor, resistor, or inductor, associated with a radio frequency integrated circuit (RFIC) is placed in an RF upper signal path with respect to the RF signal output of the RFIC. By placing the on-die passive device in the RF upper signal path, the RF current does not directly pass through the high RF loss plating material of the passive device bonding pad.

First claim

What is claimed is:

1. An electronic circuit module configured to reduce signal losses, the electronic circuit module comprising:
an electronic circuit device including a first lead, a second lead, a radio frequency (RF) output, and an integrated circuit die associated with a passive component; and
a conductive path having a first bonding pad electrically connected to the first lead and a second bonding pad located on the conductive path between the first bonding pad and an output of the electronic circuit module and electrically connected to the second lead, the electronic circuit device configured such that the passive component electrically connects to the first lead and the RF output of the electronic circuit device electrically connects to the second lead.

2. The electronic circuit module of claim 1 wherein the electronic circuit device is an RF electronic circuit device.

3. The electronic circuit module of claim 1 wherein the RF output of the electronic circuit device has an RF output signal and an RF current associated with the RF output signal when the electronic circuit device is activated.

4. The electronic circuit module of claim 1 wherein the first and second bonding pads are plated with a surface plating material including nickel, palladium, and gold.

5. The electronic circuit module of claim 1 wherein the first and the second bonding pads are plated with a surface plating material including nickel and gold.

6. The electronic circuit module of claim 1 wherein the first bonding pad and the second bonding pad each include at least one edge, at least one sidewall, and a bonding area, the at least one edge and the at least one sidewall of each of the first and second bonding pads being free from plating material.

7. The electronic circuit module of claim 1 wherein the first bonding pad and the second bonding pad each include at least one edge, at least one sidewall, and a bonding area, the at least one edge, the at least one sidewall, and the bonding area of each of the first and second bonding pads plated with a surface plating material.

8. An electronic circuit device configured to reduce signal losses, the electronic circuit device comprising:
an integrated circuit die associated with an on-die passive component;
a first lead configured to be electrically connected to a first bonding pad located on a conductive path; and
a second lead configured to be electrically connected to a second bonding pad located on the conductive path between the first bonding pad and other circuitry, the on-die passive component electrically connecting to the first lead and an output of the electronic circuit device electrically connecting to the second lead.

9. The electronic circuit device of claim 8 wherein the integrated circuit die is a radio frequency (RF) integrated circuit die.

10. The electronic circuit device of claim 8 wherein the output of the electronic circuit device is a radio frequency (RF) output having an RF output signal and an RF current associated with the RF output signal when the electronic circuit device is activated.

11. The electronic circuit device of claim 8 wherein the first bonding pad and the second bonding pad each include at least one edge, at least one sidewall, and a bonding area, the at least one edge and the at least one sidewall of each of the first and second bonding pads being free from plating material.

12. The electronic circuit device of claim 8 wherein the first bonding pad and the second bonding pad each include at least one edge, at least one sidewall, and a bonding area, the at least one edge, the at least one sidewall, and the bonding area of each of the first and the second bonding pads plated with a surface plating material.

13. The electronic circuit device of claim 8 wherein the first and the second bonding pads are wire bonding pads.

14. A method for reducing signal losses in an electronic circuit module, the method comprising:
fabricating an electronic circuit device including an output and an integrated circuit die associated with an on-die passive component;
forming a first bonding pad on a conductive path and a second bonding pad on the conductive path between the first bonding pad and an output of the electronic circuit module;
electrically connecting a first lead to the first bonding pad and electrically connecting a second lead to the second bonding pad; and
electrically connecting the on-die passive component to the first lead and electrically connecting the output of the electronic circuit device to the second lead.

15. The method of claim 14 wherein the electronic circuit module is a radio frequency (RF) electronic circuit module and the signal losses are RF signal losses.

16. The method of claim 14 wherein the electronic circuit device is a radio frequency (RF) electronic circuit device having an RF output signal and an RF current associated with the RF output signal when the RF electronic circuit device is activated.

17. The method of claim 14 wherein the integrated circuit die is a radio frequency (RF) integrated circuit die.

18. The method of claim 14 wherein the first and the second bonding pads are plated with a surface plating material including nickel, palladium, and gold.

19. The method of claim 14 wherein the first and the second bonding pads are plated with a surface plating material including nickel and gold.

20. The method of claim 14 wherein the first bonding pad and the second bonding pad are wire bonding pads.

Assignees

• Skyworks Solutions Inc

Inventors

• Sun Weimin
• Zampardi Jr Peter J
• Shao Hongxiao

Classifications

• H10W72/5475

  multiple bond wires connected to common bond pads at both ends of the wires · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title

• H10W72/59

  Bond pads specially adapted therefor · CPC title

• H10W72/5366

  the bond wires having kinks · CPC title

• H10W44/203

  Electrical connections · CPC title