FinFET field-effect transistors with atomic layer doping

Patent metadata

Field	Value
Publication number	US-9287136-B2
Application number	US-201213606873-A
Country	US
Kind code	B2
Filing date	Sep 7, 2012
Priority date	Aug 4, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C. The dopant layer includes at least 4×10 20 active dopant atoms per cm 3 that react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.

First claim

What is claimed is:

1. A multigate field-effect transistor device comprising:
a gate structure that envelops a plurality of surfaces of at least one fin that are above a substrate; and
the at least one fin, wherein the at least one fin provides a channel between a source and the gate structure and between a drain and the gate structure, the at least one fin having a maximum dimension of 30 nm,
wherein the at least one fin is composed of a semiconducting material and at least one monolayer of dopant atoms that conformally overlays the semiconducting material in three-dimensions so a conformal thickness of 5 nm or less of said at least one monolayer of dopant atoms is present on an upper surface and sidewall surfaces of the at least one fin, wherein a lattice structure of the at least one monolayer of dopant atoms substantially match a lattice structure of the semiconductor material; and
wherein the at least one monolayer of dopant atoms includes at least 4×10 20 active dopant atoms per cm 3 that are bonded with atoms on a surface of the semiconducting material such that bonding between the active dopant atoms and the atoms on the surface of the semiconducting material increases the conductivity of the surface of the semiconducting material.

2. The device of claim 1 , further comprising:
a spacer that borders the gate structure and that envelops a plurality of surfaces of the at least one fin that are above a substrate, wherein the active dopant atoms of the at least one monolayer of dopant atoms extend beneath the spacer.

3. The device of claim 1 , wherein the at least one monolayer of dopant atoms is a p-type dopant layer and includes an active dopant atom concentration of at least 1×10 21 atoms/cm 3 .

4. The device of claim 1 , wherein the at least one monolayer of dopant atoms has a resistivity of less than 10×10 −4 ohm·cm.

5. The device of claim 1 , wherein the at least one monolayer of dopant atoms has thickness of at least 5 nm.

Assignees

• Chan Kevin K
• Kim Young-Hee
• Lauer Isaac
• Muralidhar Ramachandran
• Park Dae-Gyu
• Wang Xinhui
• Yang Min
• Globalfoundries Inc

Inventors

• Chan Kevin K
• Kim Young-Hee
• Lauer Isaac
• Muralidhar Ramachandran
• Park Dae-Gyu
• Wang Xinhui
• Yang Min

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P32/1408 Primary

  from or through or into an external applied layer, e.g. photoresist or nitride layers · CPC title

• H10P32/1404

  using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase · CPC title

• H10P32/171

  being group IV material · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title