SIC epitaxial wafer and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-9287121-B2
Application number	US-201214240662-A
Country	US
Kind code	B2
Filing date	Sep 4, 2012
Priority date	Sep 9, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

A method of manufacturing a SiC epitaxial wafer wherein a SiC epitaxial layer is provided on a SiC single crystal substrate having an off angle. The method includes determining a ratio of basal plane dislocations (BPD) which cause stacking faults in a SiC epitaxial film of a prescribed thickness, to basal plane dislocations which are present on a growth surface of the SiC single crystal substrate, determining an upper limit of surface density of basal plane dislocations, preparing a SiC single crystal substrate which has surface density equal to or less than the above upper limit, and forming a SiC epitaxial film on the SiC single crystal substrate under the same conditions as the growth conditions of the epitaxial film used in the step of determining the ratio.

First claim

The invention claimed is:

1. A method of manufacturing a SiC epitaxial wafer wherein a 4H—SiC single crystal epitaxial layer is provided on a 4H—SiC single crystal substrate having an off angle, comprising:
a step of determining a ratio of basal plane dislocations (BPD), which causes stacking faults during an epitaxial growth in a 4H—SiC epitaxial film of a prescribed thickness which is formed on a 4H—SiC single crystal substrate having an off angle, to basal plane dislocations which are present on a growth surface of the 4H—SiC single crystal substrate,
a step of determining an upper limit of surface density of basal plane dislocations on the growth surface of a 4H—SiC single crystal substrate used based on the above ratio, and
a step of preparing a 4H—SiC single crystal substrate which has surface density equal to or less than the above upper limit, and forming a 4H—SiC epitaxial film on the 4H—SiC single crystal substrate under the same conditions as the growth conditions of the epitaxial film used in the step of determining the ratio.

2. The method of manufacturing a SiC epitaxial wafer according to claim 1 , wherein, when determining the ratio, the surface density of BPD on the growth surface and a surface density of stacking faults in the 4H—SiC epitaxial film caused by the BPD on the growth surface are measured by X-ray topography or photoluminescence.

3. The method of manufacturing a SiC epitaxial wafer according to claim 1 , wherein the upper limit is 1.0×10 3 BPD/cm 2 or less.

4. The method of manufacturing a SiC epitaxial wafer according to claim 1 , wherein, when determining the ratio, a surface density of stacking faults in the 4H—SiC epitaxial film caused by the BPD on the growth surface is measured by photoluminescence.

5. A method of manufacturing a SiC epitaxial wafer provided with a 4H—SiC single crystal epitaxial layer on a 4H—SiC single crystal substrate having an off angle, comprising:
a step of determining a ratio of basal plane dislocations (BPD) and threading screw dislocations (TSD), which cause carrot defects in a 4H—SiC epitaxial film of a prescribed thickness which is formed on a 4H—SiC single crystal substrate having an off angle, to all basal plane dislocations and all threading screw dislocations which are present on a growth surface of the 4H—SiC single crystal substrate,
a step of determining an upper limit of surface density of BPD and TSD on the growth surface of a 4H—SiC single crystal substrate used based on the above ratio, and
a step of preparing a 4H—SiC single crystal substrate which has surface density equal to or less than the above upper limit, and forming a 4H—SiC epitaxial film on the 4H—SiC single crystal substrate under the same conditions as the growth conditions of the epitaxial film used in the step of determining the ratio.

6. A SiC epitaxial wafer provided with a 4H—SiC single crystal epitaxial layer on a 4H—SiC single crystal substrate having an off angle, wherein the surface density of stacking faults caused by BPD of the 4H—SiC single crystal substrate is 0.1 stacking faults/cm 2 or less in the 4H—SiC epitaxial film.

Assignees

• Momose Kenji
• Odawara Michiya
• Muto Daisuke
• KAGESHIMA Yoshiaki
• Showa Denko Kk

Inventors

• Momose Kenji
• Odawara Michiya
• Muto Daisuke
• KAGESHIMA Yoshiaki

Classifications

• H10P90/129

  by polishing · CPC title

• H10P70/12

  by dry cleaning only (H10P70/52 takes precedence) · CPC title

• H10P14/3408 Primary

  Silicon carbide · CPC title

• H10P14/2926

  Crystal orientations · CPC title

• H10P14/2904 Primary

  Silicon carbide · CPC title