Semiconductor device comprising an oxide semiconductor

US9287117B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9287117-B2
Application numberUS-201314054078-A
CountryUS
Kind codeB2
Filing dateOct 15, 2013
Priority dateOct 17, 2012
Publication dateMar 15, 2016
Grant dateMar 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

To provide a highly reliable semiconductor device including an oxide semiconductor by suppression of change in its electrical characteristics. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer and a gate insulating layer provided over the oxide semiconductor layer to a region where a channel is formed, whereby oxygen vacancies which might be generated in the channel are filled. Further, extraction of oxygen from the oxide semiconductor layer by a source electrode layer or a drain electrode layer in the vicinity of the channel formed in the oxide semiconductor layer is suppressed, whereby oxygen vacancies which might be generated in a channel are suppressed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a base insulating layer; a first oxide layer over the base insulating layer; an oxide semiconductor layer over the first oxide layer; a second oxide layer over the oxide semiconductor layer; a first source electrode layer and a first drain electrode layer each of which is in contact with a top surface of the second oxide layer; a second source electrode layer and a second drain electrode layer over the first source electrode layer and the first drain electrode layer, respectively, and in contact with the top surface of the second oxide layer; a gate insulating layer over the second source electrode layer and the second drain electrode layer, and in contact with the top surface of the second oxide layer between the second source electrode layer and the second drain electrode layer; and a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein the base insulating layer and the gate insulating layer are in contact with each other. 2. The semiconductor device according to claim 1 , wherein the gate electrode layer overlaps with the first source electrode layer and the first drain electrode layer. 3. The semiconductor device according to claim 1 , wherein the gate electrode layer does not overlap with the first source electrode layer and the first drain electrode layer. 4. The semiconductor device according to claim 1 , wherein the gate electrode layer overlaps with the second source electrode layer and the second drain electrode layer. 5. The semiconductor device according to claim 1 , wherein the second source electrode layer and the second drain electrode layer cover the first source electrode layer and the first drain electrode layer, respectively. 6. The semiconductor device according to claim 1 , The first source electrode layer and the first drain electrode layer are in contact with side surfaces of the first oxide layer, the oxide semiconductor layer, and the second oxide layer. 7. The semiconductor device according to claim 1 , wherein the gate electrode layer has a stacked-layer structure. 8. The semiconductor device according to claim 1 , wherein the base insulating layer and the gate insulating layer contains oxygen, and wherein the second source electrode layer and the second drain electrode layer contains nitrogen. 9. The semiconductor device according to claim 8 , wherein each of the second source electrode layer and the second drain electrode layer is a metal nitride film. 10. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a crystal part, and wherein a c-axis of the crystal part is parallel to a normal vector of a surface of the oxide semiconductor layer. 11. A semiconductor device comprising: a base insulating layer; a first oxide layer over the base insulating layer; an oxide semiconductor layer over the first oxide layer; a first source electrode layer and a first drain electrode layer each of which is in contact with a top surface of the oxide semiconductor layer; a second oxide layer over the first source electrode layer and the first drain electrode layer; a second source electrode layer and a second drain electrode layer over the second oxide layer; a gate insulating layer over the second source electrode layer and the second drain electrode layer, and in contact with a top surface of the second oxide layer between the second source electrode layer and the second drain electrode layer; and a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein the base insulating layer and the gate insulating layer are in contact with each other. 12. The semiconductor device according to claim 11 , wherein the gate electrode layer overlaps with the first source electrode layer and the first drain electrode layer. 13. The semiconductor device according to claim 11 , wherein the gate electrode layer does not overlap with the first source electrode layer and the first drain electrode layer. 14. The semiconductor device according to claim 11 , wherein the gate electrode layer overlaps with the second source electrode layer and the second drain electrode layer. 15. The semiconductor device according to claim 11 , wherein the first source electrode layer and the first drain electrode layer are in contact with side surfaces of the first oxide layer and the oxide semiconductor layer. 16. The semiconductor device according to claim 11 , wherein the gate electrode layer has a stacked-layer structure. 17. The semiconductor device according to claim 11 , wherein the base insulating layer and the gate insulating layer contains oxygen, and wherein the second source electrode layer and the second drain electrode layer contains nitrogen. 18. The semiconductor device according to claim 17 , wherein each of the second source electrode layer and the second drain electrode layer is a metal nitride film. 19. The semiconductor device according to claims 11 , wherein the oxide semiconductor layer includes a crystal part, and wherein a c-axis of the crystal part is parallel to a normal vector of a surface of the oxide semiconductor layer. 20. The semiconductor device according to claim 11 , the semiconductor device further comprising a third source electrode layer and a third drain electrode layer, wherein the third source electrode layer is in contact with the first source electrode layer through a first contact hole provided in the second oxide layer, the second source electrode layer, and the gate insulating layer, and wherein the third drain electrode layer is in contact with the first drain electrode layer through a second contact hole provided in the second oxide layer, the second drain electrode layer, and the gate insulating layer.

Assignees

Inventors

Classifications

  • using physical deposition, e.g. vacuum deposition or sputtering · CPC title

  • of semiconductor materials · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • characterised by the materials · CPC title

  • H10D99/00Primary

    Subject matter not provided for in other groups of this subclass · CPC title

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What does patent US9287117B2 cover?
To provide a highly reliable semiconductor device including an oxide semiconductor by suppression of change in its electrical characteristics. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer and a gate insulating layer provided over the oxide semiconductor layer to a region where a channel is formed, whereby oxygen vacancies which might be generated i…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10P14/3434. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).