Methods for fabricating integrated circuits including generating photomasks for directed self-assembly (DSA) using DSA target patterns

Patent metadata

Field	Value
Publication number	US-9286434-B2
Application number	US-201414285739-A
Country	US
Kind code	B2
Filing date	May 23, 2014
Priority date	May 23, 2014
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes generating a photomask for forming a DSA directing pattern overlying a semiconductor substrate. The DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern. Generating the photomask includes identifying placement of DSA target patterns in a design layout. The DSA target patterns are grouped into groups including a first group and a first group boundary is defined around the first group. The method further includes determining if a neighboring DSA target pattern to the first group boundary is at least a predetermined minimal keep-away distance from an adjacent DSA target pattern that is within the first group boundary. The method also includes determining if the DSA target patterns in the first group are DSA compatible. An output mask pattern is generated using the first group boundary.

First claim

What is claimed is:

1. A method for fabricating an integrated circuit comprising:
using a computing system, generating a photomask for forming a DSA directing pattern overlying a semiconductor substrate, wherein the DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern, and wherein generating the photomask comprises:
identifying placement of DSA target patterns in a design layout;
grouping the DSA target patterns into groups including a first group and defining a first group boundary around the first group;
determining whether or not a neighboring DSA target pattern that is positioned adjacent to and outside of the first group boundary is at least a predetermined minimal keep-away distance from an adjacent DSA target pattern that is within the first group boundary and that is a closest one of the DSA target patterns in the first group to the neighboring DSA target pattern;
determining whether or not the DSA target patterns in the first group are DSA compatible when the neighboring DSA target pattern is at least the predetermined minimal keep-away distance from the adjacent DSA target pattern; and
generating an output mask pattern using the first group boundary when the DSA target patterns in the first group are DSA compatible.

2. The method of claim 1 , wherein the predetermined minimal keep-away distance is a predetermined edge-to-edge confinement well resolution minimal keep-away distance (D 1 ), and wherein determining whether or not the neighboring DSA target pattern is at least the predetermined minimal keep-away distance from the adjacent DSA target pattern comprises determining whether or not the neighboring DSA target pattern is at least the predetermined edge-to-edge confinement well resolution minimal keep-away distance (D 1 ) from the adjacent DSA target pattern.

3. The method of claim 2 , wherein determining whether or not the neighboring DSA target pattern is at least the predetermined minimal keep-away distance from the adjacent DSA target pattern further comprises:
determining whether or not another neighboring DSA target pattern that is positioned adjacent to and outside of the first group boundary proximate a corner of the first group boundary is at least a predetermined corner-to-corner confinement well resolution minimal keep-away distance (D 2 ) from another adjacent DSA target pattern that is within the first group boundary proximate the corner of the first group boundary, and wherein determining whether or not the DSA target patterns in the first group are DSA compatible comprises:
determining whether or not the DSA target patterns in the first group are DSA compatible when the neighboring DSA target pattern is at least the predetermined edge-to-edge confinement well resolution minimal keep-away distance (D 1 ) from the adjacent DSA target pattern and if the another neighboring DSA target pattern is at least the predetermined corner-to-corner confinement well resolution minimal keep-away distance (D 2 ) from the another adjacent DSA target pattern.

4. The method of claim 1 , wherein the predetermined minimal keep-away distance is a predetermined corner-to-corner confinement well resolution minimal keep-away distance (D 2 ), and wherein determining whether or not the neighboring DSA target pattern is at least the predetermined minimal keep-away distance from the adjacent DSA target pattern comprises determining whether or not the neighboring DSA target pattern is at least the predetermined corner-to-corner confinement well resolution minimal keep-away distance (D 2 ) from the adjacent DSA target pattern.

5. The method of claim 1 , wherein identifying placement of the DSA target patterns comprises identifying placement of the DSA target patterns that are correspondingly contact hole patterns and/or other via patterns in the design layout.

6. The method of claim 1 , wherein determining whether or not the DSA target patterns in the first group are DSA compatible comprises comparing the DSA target patterns in the first group to acceptable DSA target patterns and/or unacceptable DSA target patterns that are contained in a DSA pattern library to determine whether or not the DSA target patterns in the first group are DSA compatible.

7. The method of claim 1 , wherein generating the photomask comprises generating an optical lithography photomask.

8. The method of claim 1 , wherein generating the photomask comprises generating an EUV lithography photomask.

9. The method of claim 1 , further comprising:
patterning a photoresist layer overlying the semiconductor substrate using the photomask.

10. The method of claim 9 , wherein patterning the photoresist layer comprises patterning the photoresist layer to form the DSA directing pattern having a graphoepitaxy surface that defines a pre-pattern opening.

11. The method of claim 10 , further comprising depositing the self-assembly material on the graphoepitaxy surface including into the pre-pattern opening.

12. The method of claim 11 , further comprising phase separating the self-assembly material to define the DSA pattern.

13. The method of claim 12 , further comprising etching the DSA pattern to form a mask for transferring the DSA pattern to the semiconductor substrate.

14. The method of claim 1 , wherein using the first group boundary to generate the output mask pattern comprises using a DSA model, adjusting the first group boundary to generate the output mask pattern.

15. A method for fabricating an integrated circuit comprising:
using a computing system, generating a photomask for forming a DSA directing pattern overlying a semiconductor substrate, wherein the DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern, and wherein generating the photomask comprises:
identifying placement of DSA target patterns in a design layout;
grouping the DSA target patterns into groups including a first group and defining a first group boundary around the first group;
determining whether or not a neighboring DSA target pattern that is positioned adjacent to and outside of the first group boundary is less than a predetermined minimal keep-away distance from an adjacent DSA target pattern that is within the first group boundary;
adjusting the first group boundary to include the neighboring DSA target pattern and the first group to define an adjusted first group boundary around an adjusted first group that includes the first group and the neighboring DSA target pattern when the neighboring DSA target pattern is less than the predetermined minimal keep-away distance from the adjacent DSA target pattern;
determining whether or not the DSA target patterns in the adjusted first group are DSA compatible; and
generating an output mask pattern using the adjusted first group boundary when the DSA target patterns in the adjusted first group are DSA compatible.

16. The method of claim 15 , wherein determining whether or not the DSA target patterns in the adjusted first group are DSA compatible comprises comparing the DSA target patterns in the adjusted first group to acceptable DSA target patterns and/or unacceptable DSA target patterns that are contained in a DSA pattern library to determine whether or not the DSA target patterns in the adjusted first group are DSA compatible.

17. The method of claim 15 , wherein using the adjusted first group boundary to generate the output mask pattern comprises using a DSA model, adjusting the adjusted

Assignees

• Globalfoundries Inc

Inventors

• Zou Yi
• Wang wei-long
• Latypov Azat
• Coskun Tamer

Classifications

• H10P76/20

  of masks comprising organic materials · CPC title

• G06F30/39

  Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) · CPC title

• G06F30/398 Primary

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

• G03F7/0002

  Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping · CPC title

• G03F1/00 Primary

  Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof · CPC title