Method and apparatus for testing

US9286426B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9286426-B2
Application numberUS-201414259163-A
CountryUS
Kind codeB2
Filing dateApr 23, 2014
Priority dateApr 23, 2014
Publication dateMar 15, 2016
Grant dateMar 15, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A computer-implemented method, apparatus and computer program product for testing a design, the method comprising receiving a design; receiving a description of a scenario, wherein the scenario relates to execution of the design, wherein the scenario is used for verifying the design; translating the scenario to an input for a verification engine, wherein the verification engine is selected from the group consisting of a simulation engine and a formal analysis engine; activating the engine and providing the input to the engine, whereby the engine outputting a result; and displaying the result.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method performed by a computerized device, comprising: receiving a design; receiving a description of a scenario, wherein the scenario relates to execution of the design, wherein the scenario is used for verifying the design; selecting whether a verification engine to be used is a simulation engine or a formal analysis engine; translating the scenario to an input for the verification engine as selected; activating the verification engine as selected, and providing the input to the verification engine, whereby the verification engine outputting a result; and displaying the result. 2. The method of claim 1 , wherein said receiving the description of the scenario and said displaying the results utilize a single user interface having at least an input area and an output area. 3. The method of claim 1 , wherein the scenario comprises values of an input signal at different cycles. 4. The method of claim 1 wherein the scenario is entered using a spreadsheet-like interface. 5. The method of claim 4 wherein a signal is described by drawing horizontal lines in one or more cells in a spreadsheet using a pointing device. 6. The method of claim 5 , wherein the spreadsheet-like interface provides for adding at least one graphical element to the wave form signal description. 7. The method of claim 5 wherein a value in the spreadsheet is interpreted in at least two manners based upon the at least one graphical element. 8. The method of claim 4 wherein the spreadsheet-like interface provides an element representing repeating a part of the signal multiple times. 9. The method of claim 4 wherein the spreadsheet-like interface provides an element representing delaying a part of the signal for one or more cycles. 10. The method of claim 4 wherein the spreadsheet-like interface provides for using a macro for entering a scenario. 11. The method of claim 1 wherein the scenario is defined based on two or more signals, wherein the scenario defines that the two or more signals are synchronized. 12. The method of claim 1 , wherein a feature of the scenario is automatically translated into a coverage goal for the simulation engine and into an exploration goal for the formal analysis engine. 13. The method of claim 1 , wherein correctness checker is generated for checking an expected result of the scenario. 14. A computerized apparatus having a processor, the processor being adapted to perform the steps of: receiving a design; receiving a description of a scenario, wherein the scenario relates to execution of the design, wherein the scenario is used for verifying the design; selecting whether a verification engine to be used is a simulation engine or a formal analysis engine; translating the scenario to an input for the verification engine as selected; activating the verification engine and providing the input to the verification engine, whereby the verification engine outputting a result; and displaying the result. 15. The computerized apparatus of claim 14 , comprising a spreadsheet-like interface for entering input comprising a signal, and receiving output. 16. The computerized apparatus of claim 15 wherein the signal is entered as horizontal lines in one or more cells in a spreadsheet. 17. The computerized apparatus of claim 15 wherein the spreadsheet-like interface provides for using a macro for entering a scenario. 18. A computer program product comprising a non-transitory computer readable storage medium retaining program instructions, which program instructions when read by a processor, cause the processor to perform a method comprising: receiving a design; receiving a description of a scenario, wherein the scenario relates to execution of the design, wherein the scenario is used for verifying the design; selecting whether a verification engine to be used is a simulation engine or a formal analysis engine; translating the scenario to an input for the verification engine as selected; activating the verification engine and providing the input to the verification engine, whereby the verification engine outputting a result; and displaying the result.

Assignees

Inventors

Classifications

  • using formal methods, e.g. equivalence checking or property checking · CPC title

  • Design verification, e.g. functional simulation or model checking · CPC title

  • Circuit design · CPC title

  • Physics · mapped topic

  • Physics · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9286426B2 cover?
A computer-implemented method, apparatus and computer program product for testing a design, the method comprising receiving a design; receiving a description of a scenario, wherein the scenario relates to execution of the design, wherein the scenario is used for verifying the design; translating the scenario to an input for a verification engine, wherein the verification engine is selected from…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F30/3323. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).