Track-band squeezed-sector error correction in magnetic data storage devices

Patent metadata

Field	Value
Publication number	US-9286159-B2
Application number	US-201314072923-A
Country	US
Kind code	B2
Filing date	Nov 6, 2013
Priority date	Nov 6, 2013
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

Data storage devices using a two-level ECC scheme are described. Embodiments of the invention allow the recovery of sectors in a squeezed group of tracks in a that includes both a single track level ECC scheme and a track band ECC scheme that functions across the set of tracks in the band. The track band ECC scheme uses additional parity information calculated using input data from multiple tracks to allow correction across tracks.

First claim

The invention claimed is:

1. A data storage device that stores data in tracks that include a plurality of sectors of data, the data storage device comprising:
a first-level error correction system that writes track parity information on each track in a selected band of tracks, the track parity information being calculated using a first mathematical algorithm using data stored on one track and performs error correction using the track parity information on a selected track when the selected track is read; and wherein the first-level error correction system detects unreadable sectors in the selected track and wherein the first-level error correction includes generating modified track parity data using readable sectors and skipping unreadable sectors; and
a second-level error correction system that writes track band parity information for the selected band of tracks, the track band parity information being calculated using a second mathematical algorithm using data stored on the selected band of tracks and performs error correction using the track band parity information on a selected track band when the selected track band is read; and wherein the second-level error correction system performs error correction after the first-level error correction has completed and the second-level error correction includes generating modified track band parity data using readable and corrected sectors supplied by the first-level error correction system.

2. The data storage device of claim 1 wherein the data storage device uses shingled magnetic recording and the selected band of tracks are included in shingled region.

3. The data storage device of claim 1 wherein the second-level error correction system can correct up to a programmable number of sector-erasures in the selected track within the selected band of tracks that exceed the first-level error correction system's capability.

4. The data storage device of claim 1 wherein the track band parity information is stored on a track dedicated to track band parity information.

5. The data storage device of claim 1 wherein the second-level error correction system corrects for squeezed sector errors in the selected track.

6. The data storage device of claim 1 wherein the second-level error correction system generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT).

7. The data storage device of claim 1 wherein the second-level error correction system generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT) in tandem with a Cauchy-Matrix parity sector encoder.

8. The data storage device of claim 1 wherein the second-level error correction system generates the track band parity information using iterative calculation with programmable-multipliers and storage accumulator memory.

9. The data storage device of claim 1 wherein the second-level error correction system includes an encoder/syndrome-generator and decoder using iteratively calculated programmable-multipliers and storage accumulators.

10. The data storage device of claim 1 wherein the second-level error correction system generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT) in tandem with a Cauchy-Matrix parity sector encoder and wherein the matrices are structured and an encoder/syndrome-generator and decoder use programmable-multipliers and SRAM-storage accumulators for iterative calculations.

11. The data storage device of claim 1 wherein error correction further includes calculating syndromes containing information for the unreadable sectors by XOR'ing the modified track parity data with the track parity information read from the selected track.

12. A method of operating a data storage device that stores data in tracks that include a plurality of sectors of data, the method comprising:
performing a first-level error correction by writing track parity information on each track in a selected band of tracks, the track parity information being calculated using a first mathematical algorithm using data stored on one track and performing error correction using the track parity information on a selected track when the selected track is read; and wherein the first-level error correction includes detecting unreadable sectors in the selected track and generating modified track parity data using readable sectors and skipping unreadable sectors; and
performing a second-level error correction by writing track band parity information for the selected band of tracks, the track band parity information being calculated using a second mathematical algorithm using data stored on the selected band of tracks and performing error correction using the track band parity information on a selected track band when the selected track band is read; and wherein the second-level error correction performs error correction after the first-level error correction has completed and the second-level error correction includes generating modified track band parity data using readable and corrected sectors supplied by the first-level error correction system.

13. The method of claim 12 wherein the second-level error correction corrects for errors in the selected track that exceed the first-level error correction capability.

14. The method of claim 12 wherein error correction further includes calculating syndromes containing information for the unreadable sectors by XOR'ing the modified track parity data with the track parity information read from the selected track.

15. The method of claim 12 wherein the second-level error correction generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT).

16. The method of claim 12 wherein the second-level error correction generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT) in tandem with a Cauchy-Matrix parity sector encoder.

17. The method of claim 12 wherein the second-level error correction generates the track band parity information using iterative calculation with programmable-multipliers and storage accumulator memory.

18. The method of claim 12 wherein the second-level error correction generates the track band parity information in sectors by using a Vandermonde matrix discrete Fourier transform (DFT) in tandem with a Cauchy-Matrix parity sector encoder and wherein the matrices are structured and an encoder/syndrome-generator and decoder use programmable-multipliers and SRAM-storage accumulators for iterative calculations.

Assignees

• HGST Netherlands BV

Inventors

• Chatradhi Sridhar
• Hassner Martin Aureliano
• Hwang Kirk
• Yamamoto Satoshi

Classifications

• G11B20/1833 Primary

  by adding special lists or symbols to the coded information (G11B20/1806, G11B20/1866 take precedence) · CPC title

• G06F11/1076 Primary

  Parity data used in redundant arrays of independent storages, e.g. in RAID systems · CPC title

• G11B2020/1222

  ECC block, i.e. a block of error correction encoded symbols which includes all parity data needed for decoding · CPC title

• H03M13/2906

  using block codes (H03M13/2957 takes precedence) · CPC title