Performance, thermal and power management system associated with an integrated circuit and related method

US9285810B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9285810-B2
Application numberUS-201414507844-A
CountryUS
Kind codeB2
Filing dateOct 7, 2014
Priority dateDec 19, 2011
Publication dateMar 15, 2016
Grant dateMar 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The performance, thermal and power management system is configured to perform DVFS calibration, temperature compensation adjustment, aging calibration, and DC offset calibration in an IC. The initial voltage supplied to the IC may be set to an initial value which takes chip-to-chip process variations into account and then dynamically adjusted according to temperature variations, DC offset and/or aging effects. Therefore, the performance, thermal and power management system may achieve optimized thermal and power performance of the IC.

First claim

Opening claim text (preview).

What is claimed is: 1. A performance, thermal and power (PTP) management system associated with an integrated circuit (IC), comprising: a performance circuit with adjustable configurations for simulating operations of the IC when receiving a supply voltage; a sensing module configured to obtain a characteristic of the performance circuit by measuring a non-aged voltage of the performance circuit and an aged voltage of the performance circuit; a memory for storing characterization data which includes a voltage-frequency relationship of the IC when operating at a predetermined temperature for a given application use and a voltage difference between the non-aged voltage and the aged voltage of the performance circuit; and a PTP controller configured to: set the performance circuit in a specific configuration according to the characterization data, wherein the specific configuration is commensurate with the voltage difference; and adjust a level of the supply voltage according to the characteristic of the performance circuit. 2. The PTP management system of claim 1 , wherein: the PTP controller is further configured to calculate a specific voltage for operating the IC at a specific frequency and the predetermined room temperature according to the voltage-frequency relationship and adjust the level of the supply voltage according to the specific voltage. 3. The PTP management system of claim 1 , wherein: the performance circuit includes a first PTP detector and a second PTP detector having an identical circuitry; the PTP controller is further configured to: power on the first PTP detector during a booting sequence of the IC and power off the first PTP detector after the booting sequence of the IC ends; and power on the second PTP detector according to a system clock based on which the IC operates; and the sensing module is further configured to measure the non-aged voltage based on the first PTP detector and measure the aged voltage based on the second PTP detector. 4. A performance, thermal and power (PTP) management system associated with an integrated circuit (IC), comprising: a performance circuit with adjustable configurations for simulating operations of the IC when receiving a supply voltage, the performance circuit including a first PTP detector and a second PTP detector having an identical circuitry; a sensing module configured to obtain a characteristic of the performance circuit by measuring a non-aged voltage of the performance circuit and an aged voltage of the performance circuit; a memory for storing characterization data which includes a voltage-frequency relationship of the IC when operating at a predetermined temperature for a given application use; and a PTP controller configured to: power on the first PTP detector during a booting sequence of the IC and power off the first PTP detector after the booting sequence of the IC ends; power on the second PTP detector according to a system clock based on which the IC operates; set the performance circuit in a specific configuration according to the characterization data; and adjust a level of the supply voltage according to the characteristic of the performance circuit. 5. The PTP management system of claim 4 , wherein: the sensing module is further configured to measure the non-aged voltage based on the first PTP detector and measure the aged voltage based on the second PTP detector. 6. A method for performance, thermal and power (PTP) management system associated with an integrated circuit (IC), comprising: providing a performance circuit with adjustable configurations for simulating operations of the IC when receiving a supply voltage; powering on a first PTP detector of the performance circuit during a booting sequence of the IC and powering off the first PTP detector after the booting sequence of the IC ends; powering on a second PTP detector of the performance circuit according to a system clock based on which the IC operates; providing characterization data associated with the IC by acquiring a voltage-frequency relationship of the IC when operating at a predetermined temperature for a given application use; calculating a voltage difference based on a difference between a non-aged performance and an aged performance of the performance circuit; calculating a specific voltage for operating the IC at a specific frequency and the predetermined temperature according to the voltage-frequency relationship; setting the performance circuit in a specific configuration according to the characterization data; and adjusting a level of the supply voltage according to a characteristic of the performance circuit and the specific voltage. 7. The method of claim 6 , further comprising: measuring the non-aged performance based on the first PTP detector and measuring the aged performance based on the second PTP detector; and setting the performance circuit in a configuration commensurate with the voltage difference.

Assignees

Inventors

Classifications

  • Test controller, e.g. BIST state machine (for scan test G01R31/318555) · CPC title

  • Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

  • G05F1/462Primary

    as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic · CPC title

  • Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title

  • Power aspects, e.g. power supplies for test circuits, power saving during test (for scan test G01R31/318575) · CPC title

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Frequently asked questions

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What does patent US9285810B2 cover?
The performance, thermal and power management system is configured to perform DVFS calibration, temperature compensation adjustment, aging calibration, and DC offset calibration in an IC. The initial voltage supplied to the IC may be set to an initial value which takes chip-to-chip process variations into account and then dynamically adjusted according to temperature variations, DC offset and/o…
Who is the assignee on this patent?
Mediatek Singapore Pte Ltd
What technology area does this patent fall under?
Primary CPC classification G05F1/462. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).