Display panel, method of manufacturing the same, and liquid crystal display panel

Patent metadata

Field	Value
Publication number	US-9285619-B2
Application number	US-201414277863-A
Country	US
Kind code	B2
Filing date	May 15, 2014
Priority date	Jun 4, 2013
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

A liquid crystal display panel includes a thin film transistor disposed on an insulating substrate in a display region, an external wiring for connecting the thin film transistor to a terminal electrode, and a planarized film disposed on the thin film transistor, and having a planarized upper surface. The planarized film is not disposed, or a planarized film having a smaller film thickness than that of the planarized film in the display region is disposed, above the external wiring in a frame region.

First claim

What is claimed is:

1. A display panel comprising:
an insulating substrate in which a display region and a frame region surrounding said display region are defined;
a thin film transistor disposed on said insulating substrate in said display region;
a terminal electrode disposed on said insulating substrate in said frame region;
a wiring disposed on said insulating substrate, for connecting said thin film transistor to said terminal electrode;
an insulating film having an opening in said terminal electrode so that there is no direct contact between said insulating film and said terminal electrode, and covering said wiring; and
a planarized film disposed on said thin film transistor, and having a planarized upper surface, wherein
said planarized film is not disposed, or a planarized film having a smaller film thickness than that of said planarized film disposed in said display region is disposed, above said wiring in said frame region.

2. The display panel according to claim 1 , further comprising:
an interlayer insulating film covering a laminated structure including said wiring and said insulating film, in said frame region.

3. The display panel according to claim 1 , wherein
said planarized film comprises one of an organic resin film and a spin on glass (SOG) film.

4. A liquid crystal display panel including a display panel, wherein said display panel comprises:
an insulating substrate in which a display region and a frame region surrounding said display region are defined;
a thin film transistor disposed on said insulating substrate in said display region;
a terminal electrode disposed on said insulating substrate in said frame region;
a wiring disposed on said insulating substrate, for connecting said thin film transistor to said terminal electrode;
an insulating film having an opening in said terminal electrode so that there is no direct contact between said insulating film and said terminal electrode, and covering said wiring; and
a planarized film disposed on said thin film transistor, and having a planarized upper surface, wherein
said planarized film is not disposed, or a planarized film having a smaller film thickness than that of said planarized film disposed in said display region is disposed, above said wiring in said frame region, and
said liquid crystal display panel comprises:
a liquid crystal layer disposed above said planarized film in said display region; and
a pixel electrode and an opposed electrode disposed between said planarized film and said liquid crystal layer in said display region and provided to apply a fringe electric field to said liquid crystal layer.

5. A method of manufacturing a display panel comprising the steps of:
(a) forming a thin film transistor on an insulating substrate in a display region, in said insulating substrate said display region and a frame region surrounding said display region being defined, forming a terminal electrode on said insulating substrate in said frame region, forming a wiring for connecting said thin film transistor to said terminal electrode on said insulating substrate, and forming an insulating film for covering said terminal electrode and said wiring;
(b) forming a planarized film having a planarized upper surface on a whole surface of said insulating substrate after said step (a);
(c) forming a contact hole in said planarized film on said thin film transistor, in said display region, and removing said planarized film formed above said terminal electrode and reducing a film thickness of said planarized film formed above said wiring to be thinner than said planarized film in said display region, in said frame region, and
(d) forming an opening over said terminal electrode by etching said insulating film after said step (c).

6. The method of manufacturing the display panel according to claim 5 , wherein
said step (c) comprises the step of:
reducing the film thickness of said planarized film formed above said wiring in said frame region to be thinner than said planarized film formed in said display region by performing a photolithography step with a photomask having a light-blocking portion having a lattice pattern, and
a sum of a size of one lattice in said lattice pattern and a distance between adjacent lattices in said lattice pattern is 3μm.

7. The method of manufacturing the display panel according to claim 5 , wherein
in said step (d), said insulating film is etched with said planarized film used as an etching mask.

8. The method of manufacturing the display panel according to claim 5 , further comprising the step of:
(e) removing said planarized film formed above said wiring in said frame region by ashing after said step (d).

9. A display panel comprising:
an insulating substrate in which a display region and a frame region surrounding said display region are defined;
a thin film transistor disposed on said insulating substrate in said display region;
a terminal electrode disposed on said insulating substrate in said frame region;
a wiring disposed on said insulating substrate, for connecting said thin film transistor to said terminal electrode;
an insulating film having an opening over said terminal electrode, and covering said wiring; and
a planarized film disposed on said thin film transistor and above said wiring in said frame region, and having a planarized upper surface, wherein
said planarized film having a smaller film thickness in said frame region than that of said planarized film disposed in said display region.

10. A liquid crystal display panel including a display panel, wherein said display panel comprises:
an insulating substrate in which a display region and a frame region surrounding said display region are defined;
a thin film transistor disposed on said insulating substrate in said display region;
a terminal electrode disposed on said insulating substrate in said frame region;
a wiring disposed on said insulating substrate, for connecting said thin film transistor to said terminal electrode;
an insulating film having an opening over said terminal electrode, and covering said wiring; and
a planarized film disposed on said thin film transistor and above said wiring in said frame region, and having a planarized upper surface, wherein
said planarized film having a smaller film thickness in said frame region than that of said planarized film disposed in said display region, and
said liquid crystal display panel comprises:
a liquid crystal layer disposed above said planarized film in said display region; and
a pixel electrode and an opposed electrode disposed between said planarized film and said liquid crystal layer in said display region and provided to apply a fringe electric field to said liquid crystal layer.

Assignees

• Mitsubishi Electric Corp

Inventors

• Yamayoshi Kazushi
• Sonoda Takeshi
• Takai Koichi
• Miyakawa Osamu
• Ogata Shinsuke
• Shimamura Takeshi

Classifications

• G02F1/13458

  Terminal pads · CPC title

• G02F1/13452

  Conductors connecting driver circuitry and terminals of panels · CPC title

• G02F1/133345 Primary

  Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/1333

  Constructional arrangements; {Manufacturing methods}(G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/136227

  Through-hole connection of the pixel electrode to the active element through an insulation layer · CPC title