Semiconductor Mach-Zehnder modulator and method for manufacturing semiconductor Mach-Zehnder modulators

US9285613B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9285613-B2
Application numberUS-201313899986-A
CountryUS
Kind codeB2
Filing dateMay 22, 2013
Priority dateJun 4, 2012
Publication dateMar 15, 2016
Grant dateMar 15, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor Mach-Zehnder modulator includes a substrate having a main surface including first, second and third regions sequentially arranged along a direction; a waveguide mesa including first and second waveguide arms provided on the second region, first and second optical couplers provided on the first and third regions, respectively; a first semiconductor protective layer provided on side surfaces of the first and second waveguide arms; a buried layer provided on side surfaces of the waveguide mesa and on the main surface, the buried layer including a material having a dielectric constant lower than that of the first protective layer; and first and second upper electrodes provided on the first and second waveguide arms, respectively. The first and second optical couplers are connected to the first and second waveguide arms. Above the second region, the buried layer is provided on the first protective layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor Mach-Zehnder modulator comprising: a substrate having a main surface, the main surface including a first region, a second region and a third region sequentially arranged along a direction intersecting with a normal vector of the main surface; a first waveguide arm and a second waveguide arm provided on the second region, a first optical coupler provided on the first region, and a second optical coupler provided on the third region, each of the first waveguide arm and the second waveguide arm having a waveguide mesa extending within each of the first, second and third regions and including a core layer composed of a semiconductor material; a first protective layer having a thickness between 200 nm and 300 nm provided on sides of the first waveguide arm and on sides of the second waveguide arm in contact with side surfaces of the waveguide mesa of each of the first and second waveguide arms, the first protective layer being formed of a non-doped semiconductor layer or a semi-insulating semiconductor layer; a second protective layer formed of a dielectric film; a buried layer provided on the side surfaces of each waveguide mesa in the first, second, and third regions and on the main surface of the substrate so as to bury each waveguide mesa, the buried layer including a material having a dielectric constant lower than that of the first protective layer; a first upper electrode provided on the first waveguide arm and on the buried layer disposed on the main surface of the substrate; and a second upper electrode provided on the second waveguide arm and on the buried layer disposed on the main surface of the substrate, wherein the first optical coupler is connected to the first waveguide arm and the second waveguide arm, the second optical coupler is connected to the first waveguide arm and the second waveguide arm, above the second region, the buried layer is provided on the first protective layer at the sides of the first waveguide arm and the second waveguide arm, above the second region, the sides of the first and second waveguide arms are not covered by the first upper electrode and the second upper electrode, above the first region and the third region, the buried layer is provided on side surfaces of the first optical coupler and on side surfaces of the second optical coupler, the side surfaces of the first and second optical couplers not having the first protective layer, above the first region and the third region, the second protective layer is provided between the buried layer and the side surfaces of the first and second optical couplers, and above the second region, the second protective layer is provided between the buried layer and the first protective layer. 2. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the second protective layer is formed of a silicon dioxide film or a silicon nitride film. 3. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the first optical coupler and the second optical coupler include a multi-mode interference coupler. 4. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the buried layer is formed of a benzocyclobutene resin. 5. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the waveguide mesa includes a lower cladding layer, and an upper cladding layer, and the core layer is provided between the lower cladding layer and the upper cladding layer. 6. The semiconductor Mach-Zehnder modulator according to claim 1 , wherein the buried layer has openings on the first and second waveguide arms, the first and second upper electrodes are provided in the openings and on the buried layer, and the first and second upper electrodes are in contact with the first and second waveguide arms through the openings.

Assignees

Inventors

Classifications

  • G02F1/218Primary

    using semi-conducting materials · CPC title

  • Physics · mapped topic

  • G02F1/025Primary

    in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title

  • the optical waveguides being made of semiconducting materials · CPC title

  • of interferometric switch type · CPC title

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What does patent US9285613B2 cover?
A semiconductor Mach-Zehnder modulator includes a substrate having a main surface including first, second and third regions sequentially arranged along a direction; a waveguide mesa including first and second waveguide arms provided on the second region, first and second optical couplers provided on the first and third regions, respectively; a first semiconductor protective layer provided on si…
Who is the assignee on this patent?
Sumitomo Electric Industries
What technology area does this patent fall under?
Primary CPC classification G02F1/218. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).