Variable reluctance sensor interface with integration based arming threshold

Patent metadata

Field	Value
Publication number	US-9285244-B2
Application number	US-201514723420-A
Country	US
Kind code	B2
Filing date	May 27, 2015
Priority date	Aug 1, 2012
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

First claim

The invention claimed is:

1. A method of processing a variable reluctance sensor signal provided by a variable reluctance sensor, comprising:
integrating the variable reluctance sensor signal and providing a corresponding integrated signal indicative of a total flux change of the variable reluctance sensor;
comparing the integrated signal with a predetermined arming threshold and providing a corresponding armed signal;
comparing the variable reluctance sensor signal with a reference signal and providing a zero detect signal indicative thereof;
clearing the integrated signal after the armed signal is provided;
providing a crossing signal when the zero detect signal is provided after the armed signal is provided;
holding the crossing signal in reset until the zero detect signal is provided;
releasing the crossing signal from reset when the zero detect signal is provided; and
after releasing the crossing signal from reset, providing the crossing signal in response to the armed signal being provided.

2. The method of claim 1 , wherein said integrating the variable reluctance sensor signal comprises integrating a pulse of the variable reluctance sensor signal indicative of an electromagnetic force generated by the variable reluctance sensor.

3. The method of claim 1 , wherein said comparing the integrated signal with a predetermined arming threshold comprises comparing the integrated signal with a predetermined arming threshold having a value sufficient to minimize false arming.

4. The method of claim 1 , wherein said integrating the variable reluctance sensor signal comprises charging a capacitor and wherein said clearing the integrated signal comprises discharging the capacitor.

5. The method of claim 1 , wherein said clearing the integrated signal comprises clearing the integrated signal in response to the crossing signal being provided.

6. The method of claim 1 , wherein said clearing the integrated signal comprises using the crossing signal as a reset signal to clear the integrated signal.

7. The method of claim 1 , further comprising clearing the armed signal before onset of a subsequent pulse of the variable reluctance sensor signal.

8. The method of claim 1 , further comprising filtering the armed signal.

9. The method of claim 1 , further comprising filtering the zero detect signal.

10. The method of claim 1 , further comprising using the armed signal to enable zero crossing detection.

11. A method for detecting a position of a variable reluctance sensor signal provided by a variable reluctance sensor, comprising:
providing an integrator for receiving the variable reluctance sensor signal and for providing an integrated signal which is indicative of total flux change of the variable reluctance sensor;
providing an arming comparator for comparing the integrated signal with a predetermined arming threshold and for providing an armed signal indicative thereof;
providing a detect comparator for comparing the variable reluctance sensor signal with a reference signal and for providing a zero detect signal indicative thereof; and
providing a detect circuit for receiving the armed signal, for providing a reset signal for resetting the integrator after the armed signal is provided, and for providing a crossing signal when the zero detect signal is provided after the armed signal indicates an armed condition.

12. The method of claim 11 , wherein said providing an integrator comprises providing an amplifier with a feedback capacitor, and further comprising providing a switch coupled to discharge the capacitor in response to the reset signal.

13. The method of claim 11 , further comprising providing the predetermined arming threshold with a value sufficient to minimize false arming.

14. The method of claim 11 , further comprising using the crossing signal as the reset signal.

15. The method of claim 11 , wherein said providing a reset signal comprises providing the reset signal at a selected time before a subsequent pulse of the variable reluctance sensor signal.

16. The method of claim 11 , wherein said providing an arming comparator comprises providing an arming comparator that clears the armed signal before onset of a subsequent pulse of the variable reluctance sensor signal.

17. The method of claim 11 , wherein:
said providing an integrator comprises:
providing a resistor having a first end coupled to a node receiving the variable reluctance sensor signal and having a second end;
providing a capacitor; and
providing an amplifier having a first input coupled to the second end of the resistor and to a first end of said capacitor, having a second input receiving a reference signal, and having an output coupled to a second end of the capacitor in which the output provides the integrated signal; and

wherein said providing an arming comparator includes providing an arming comparator having a first input receiving the integrated signal, having a second input receiving the predetermined arming threshold, and having an output providing the armed signal.

18. The method of claim 17 , further comprising:
providing a transistor having first and second current terminals coupled to the first and second ends of the capacitor, respectively, and having a control terminal;
wherein said providing a detect circuit comprises providing a latch having a clock input receiving the armed signal, having a data input receiving a logic one signal, and having an output providing a crossing signal to the control terminal of the transistor; and
wherein said providing a detect comparator comprises providing a detect comparator having a first input for receiving the variable reluctance sensor signal, having a second input receiving the reference signal, and having an output providing a detect signal to an inverting reset input of the latch.

19. The method of claim 18 , further comprising filtering at least one of the armed signal and the detect signal.

Assignees

• Freescale Semiconductor Inc

Inventors

• Pigott John M
• Brauchler Fred T
• Edwards William E
• Garrard Mike R
• Gray Randall C
• Hall John M

Classifications

• G01D5/24476

  Signal processing (G01D5/2448 - G01D5/24495 take precedence) · CPC title

• G01D5/2013 Primary

  by a movable ferromagnetic element, e.g. a core (G01D5/2033 takes precedence) · CPC title

• G01P3/488

  delivered by variable reluctance detectors · CPC title

• G01P3/489

  Digital circuits therefor · CPC title