Use of metal phosphorus in metallization of photovoltaic devices and method of fabricating same

Patent metadata

Field	Value
Publication number	US-9284656-B2
Application number	US-201113154058-A
Country	US
Kind code	B2
Filing date	Jun 6, 2011
Priority date	Jun 6, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

A photovoltaic device, such as a solar cell, including a copper-containing-grid metallization structure that contains a metal phosphorus layer as a diffusion barrier is provided. The copper-containing-grid metallization structure includes, from bottom to top, an electroplated metal phosphorus layer that does not include copper or a copper alloy located within a grid pattern formed on a front side surface of a semiconductor substrate, and an electroplated copper-containing layer. A method of forming such a structure is also provided.

First claim

What is claimed is:

1. A photovoltaic device comprising:
a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other, wherein an upper exposed surface of one of the semiconductor portions represents a front side surface of the semiconductor substrate;
patterned antireflective coatings on the front side surface of the semiconductor substrate, wherein said patterned antireflective coatings protect some of the semiconductor portions of the front side surface of the semiconductor substrate, while leaving other of the semiconductor portions of the front side surface of the semiconductor substrate exposed, said other of the semiconductor portions of the front side surface of the semiconductor substrate that are exposed form a grid pattern on the front side surface;
a metal phosphorus layer located directly on the other of the semiconductor portions of the front side surface of the semiconductor substrate that are exposed, wherein vertical sidewalls of said metal phosphorus layer are in direct contact with a vertical sidewall portion of the patterned antireflective coatings; and
a copper-containing layer located atop the metal phosphorus layer, said copper-containing layer having vertical sidewalls that are vertically coincident to said vertical sidewalls of said metal phosphorus layer, wherein said vertical sidewalls of said copper-containing layer are in direct physical contact with another vertical sidewall portion of said patterned antireflective coatings and a topmost surface that is located above a topmost surface of said patterned antireflective coatings.

2. The semiconductor structure of claim 1 , wherein said metal phosphorus layer comprises from 1 atomic % to 30 atomic % phosphorus.

3. The semiconductor structure of claim 1 , wherein said metal phosphorus layer comprises Ni or Co as a metal component.

4. The semiconductor structure of claim 1 , wherein said metal phosphorus layer comprises nickel phosphorus and said copper-containing layer comprises copper.

5. The semiconductor structure of claim 1 , wherein said metal phosphorus layer comprises cobalt phosphorus and said copper-containing layer comprises copper.

6. The semiconductor structure of claim 1 , wherein said semiconductor substrate is a component of a solar cell.

7. The semiconductor structure of claim 1 , wherein said p-type semiconductor portion is located beneath the n-type semiconductor portion.

8. The semiconductor structure of claim 1 , wherein an entire upper surface of said patterned antireflective coatings is planar.

9. A photovoltaic device comprising:
a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other, wherein an upper exposed surface of one of the semiconductor portions represents a front side surface of the semiconductor substrate;
patterned antireflective coatings on the front side surface of the semiconductor substrate, wherein said patterned antireflective coatings protect some of the semiconductor portions of the front side surface of the semiconductor substrate, while leaving other of the semiconductor portions of the front side surface of the semiconductor substrate exposed, said other of the semiconductor portions of the front side surface of the semiconductor substrate that are exposed form a grid pattern on the front side surface;
a metal semiconductor alloy layer located directly on the other of the semiconductor portions of the front side surface of the semiconductor substrate that are exposed, wherein said metal semiconductor alloy layer has a bottommost surface that is located beneath a topmost surface of said semiconductor substrate, a topmost surface located above said topmost surface of said semiconductor substrate, and upper vertical sidewalls that are in direct contact with a first vertical sidewall portion of the patterned antireflective coatings;
a metal phosphorus layer located directly on said topmost surface of said metal semiconductor alloy portion, wherein vertical sidewalls of said metal phosphorus layer are in direct contact with a second vertical sidewall portion of the patterned antireflective coatings; and
a copper-containing layer located atop the metal phosphorus layer, said copper-containing layer having vertical sidewalls that are vertically coincident to said vertical sidewalls of said metal phosphorus layer, wherein said vertical sidewalls of said copper-containing layer are in direct physical contact with a third vertical sidewall portion of said patterned antireflective coatings and a topmost surface that is located above a topmost surface of said patterned antireflective coatings.

10. The semiconductor structure of claim 9 , wherein said metal semiconductor alloy layer is a continuous layer.

11. The semiconductor structure of claim 9 , wherein said metal semiconductor alloy is a discontinuous layer.

12. The semiconductor structure of claim 9 , wherein said metal phosphorus layer comprises nickel phosphorus, said copper-containing layer comprises copper, and said metal semiconductor alloy layer comprises a nickel silicide layer.

13. The semiconductor structure of claim 9 , wherein said metal phosphorus layer comprises cobalt phosphorus, said copper-containing layer comprises copper, and said metal semiconductor alloy layer comprises a nickel silicide layer.

14. The semiconductor structure of claim 9 , wherein said metal phosphorus layer comprises from 1 atomic % to 30 atomic % phosphorus.

15. The semiconductor structure of claim 9 , wherein said metal phosphorus layer comprises Ni or Co as a metal component.

16. The semiconductor structure of claim 9 , wherein said semiconductor substrate is a component of a solar cell.

17. The semiconductor structure of claim 9 , wherein said p-type semiconductor portion is located beneath the n-type semiconductor portion.

18. The semiconductor structure of claim 9 , wherein an entire upper surface of said patterned antireflective coatings is planar.

Assignees

• Fisher Kathryn C
• Huang Qiang
• Papa Rao Satyavolu S
• IBM

Inventors

• Fisher Kathryn C
• Huang Qiang
• Papa Rao Satyavolu S

Classifications

• H10P14/47

  Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/032

  of conductive barrier, adhesion or liner layers · CPC title

• H10F77/315

  the coatings being antireflective or having enhancing optical properties · CPC title

• H10F77/215

  Geometries of grid contacts · CPC title