Multilayer circuit substrate

US9282632B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9282632-B2
Application numberUS-201313861907-A
CountryUS
Kind codeB2
Filing dateApr 12, 2013
Priority dateNov 14, 2012
Publication dateMar 8, 2016
Grant dateMar 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer circuit substrate includes: a first conductor layer in which first transmission lines and a second transmission line are formed; a second conductive layer facing the first conductive layer through an insulating layer; and a third conductive layer that faces the second conductive layer through an insulating layer and that has a bypass line formed therein. The bypass line is electrically connected to the second transmission line of the first conductive layer through via conductors and such that the second transmission line and the first transmission lines intersect with each other. In the second conductive layer, a ground conductor is formed at least in a position that faces the bypass line, and the first transmission lines are made narrower at the intersection with the second transmission line than other portions.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer circuit substrate formed by alternately stacking insulating layers and conductive layers, comprising: a first conductive layer having a first transmission line and a second transmission line formed therein; a second conductive layer facing the first conductive layer through an insulating layer; and a third conductive layer facing the second conductive layer through an insulating layer, the third conductive layer having a bypass line electrically connected to the second transmission line of the first conductive layer through a via conductor so as to allow the second transmission line to intersect with the first transmission line, wherein the second conductive layer has a ground conductor formed at least in a position that overlaps the bypass line in a plan view, and wherein the first transmission line is formed such that a line width thereof at an intersection with the second transmission line is made smaller than that in other portions. 2. The multilayer circuit substrate according to claim 1 , further comprising a fourth conductive layer facing the third conductive layer through an insulating layer, the fourth conductive layer having a ground conductor formed at least in a position that overlaps the bypass line in a plan view. 3. The multilayer circuit substrate according to claim 1 , further comprising a core layer that is thicker than any of the first to third conductive layers, wherein the core layer has a recess or penetrating hole formed therein, and wherein an electronic component is embedded in the recess or penetrating hole. 4. A high frequency circuit module, comprising: the multilayer circuit substrate according to claim 1 ; and an electronic component mounted on the multilayer circuit substrate. 5. A multilayer circuit substrate formed by alternately stacking insulating layers and conductive layers, comprising: a first conductive layer having a first transmission line and a second transmission line formed therein; a second conductive layer facing the first conductive layer through an insulating layer; and a third conductive layer facing the second conductive layer through an insulating layer, the third conductive layer having a bypass line electrically connected to the second transmission line of the first conductive layer through a via conductor so as to allow the second transmission line to intersect with the first transmission line, wherein the second conductive layer has a ground conductor formed at least in a position that faces the bypass line, wherein the first transmission line is formed such that a line width thereof at an intersection with the second transmission line is made smaller than that in other portions, wherein, in the ground conductor of the second conductive layer, an opening pattern is formed at least in a position that faces the first transmission line, except for an intersection with the second transmission line, and wherein the third conductive layer has a ground conductor formed in a position that faces the first transmission line of the first conductive layer. 6. The multilayer circuit substrate according to claim 5 , wherein, in the first conductive layer, a plurality of the first transmission lines are formed so as to be parallel to each other, and between the plurality of the first transmission lines, first ground lines are formed so as to be parallel to the first transmission lines, and wherein the ground conductor of the second conductive layer includes second ground lines formed so as to face the first ground lines in the opening pattern. 7. The multilayer circuit substrate according to claim 6 , wherein the second ground lines are made wider than the first ground lines. 8. The multilayer circuit substrate according to claim 5 , further comprising a fourth conductive layer facing the third conductive layer through an insulating layer, the fourth conductive layer having a ground conductor formed at least in a position that faces the bypass line. 9. The multilayer circuit substrate according to claim 5 , further comprising a core layer that is thicker than any of the first to third conductive layers, wherein the core layer has a recess or penetrating hole formed therein, and wherein an electronic component is embedded in the recess or penetrating hole. 10. A high frequency circuit module, comprising: the multilayer circuit substrate according to claim 5 ; and an electronic component mounted on the multilayer circuit substrate.

Assignees

Inventors

Classifications

  • associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title

  • Stacked transmission lines · CPC title

  • Signal conductors in same plane as power plane · CPC title

  • H05K1/0253Primary

    Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings (H05K1/0251 takes precedence) · CPC title

  • Split or nearly split shielding or ground planes · CPC title

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Frequently asked questions

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What does patent US9282632B2 cover?
A multilayer circuit substrate includes: a first conductor layer in which first transmission lines and a second transmission line are formed; a second conductive layer facing the first conductive layer through an insulating layer; and a third conductive layer that faces the second conductive layer through an insulating layer and that has a bypass line formed therein. The bypass line is electric…
Who is the assignee on this patent?
Taiyo Yuden Kk
What technology area does this patent fall under?
Primary CPC classification H05K1/0253. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).