Table-driven routing in a dragonfly processor interconnect network

US9282037B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9282037-B2
Application numberUS-201113290567-A
CountryUS
Kind codeB2
Filing dateNov 7, 2011
Priority dateNov 5, 2010
Publication dateMar 8, 2016
Grant dateMar 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes and a plurality of routers. The routers are operable to route data by selecting from among a plurality of network paths from a target node to a destination node in the dragonfly network based on one or more routing tables.

First claim

Opening claim text (preview).

What is claimed is: 1. A multiprocessor computer system including a processor interconnect network, comprising: a plurality of groups of routers, wherein the plurality of groups of routers are interconnected through an intergroup interconnection network, each group of routers comprises a respective plurality of local routers locally coupled to each other router in the corresponding plurality of local routers through a respective intragroup interconnection network, wherein at least a particular router in a particular one of the plurality of groups of routers is to: access at least one routing table from a plurality of routing tables, wherein the plurality of routing tables comprises at least one local routing table corresponding to the intragroup interconnection network of the particular group of routers and a plurality of global routing tables corresponding to the intergroup interconnection network; route data to another router coupled to the intergroup interconnection network by selecting a network path from among a plurality of network paths from a target node to a destination node in the network based on the at least one routing table, wherein the plurality of global routing tables include: a non-minimal table to route non-minimal traffic to an intermediate group of routers that is connected to all other groups of routers in the plurality of groups of routers, a minimal table to determine a direct path from one router group to another router group in the plurality of router groups, network congestion information corresponding to the intragroup interconnection network of the particular group of routers, and failed network link information corresponding to the intragroup interconnection network of the particular group of routers, wherein the network path is selected based on one or more of the network congestion information and failed network link information. 2. The multiprocessor computer system of claim 1 , wherein routing within a group comprises using one or more minimal or non-minimal local routing tables. 3. The multiprocessor computer system of claim 1 , wherein routing between groups comprises using one or more minimal or non-minimal global routing tables. 4. The multiprocessor computer system of claim 1 , the routing tables comprising minimal and non-minimal tables. 5. A method of operating a multiprocessor computer system, comprising: routing data within a processor interconnect network, wherein the processor interconnect network comprises a plurality of groups of routers, the plurality of groups of routers are interconnected through an intergroup interconnection network, and each group of routers comprises a respective plurality of local routers locally coupled to each other router in the corresponding plurality of local routers through a respective intergroup interconnection network, wherein the data is routed from a first router in a first one of the plurality of groups of routers to a second router in a second one of the plurality of groups of routers, and routing the data comprises: accessing at least one routing table from a plurality of routing tables, wherein the plurality of routing tables comprises at least one local routing table corresponding to the one of the intragroup interconnection networks and a plurality of global routing tables corresponding to the intergroup interconnection network, the plurality of global routing tables comprises a non-minimal table and a minimal table; selecting from among a plurality of network paths from a target node to a destination node in the network based on information in the plurality of global routing tables and one or more of network congestion information corresponding to at least one of the intragroup interconnection networks and failed network link information corresponding to at least one of the intragroup interconnection networks. 6. The method of operating a multiprocessor computer system of claim 5 , wherein routing within a group comprises using one or more minimal or non-minimal local routing tables. 7. The method of operating a multiprocessor computer system of claim 5 , wherein routing between groups comprises using one or more minimal or non-minimal global routing tables. 8. The method of operating a multiprocessor computer system of claim 5 , the routing tables comprising minimal and non-minimal tables.

Assignees

Inventors

Classifications

  • based on throughput or bandwidth · CPC title

  • of virtual routers · CPC title

  • Routing in connection-oriented networks, e.g. X.25 or ATM · CPC title

  • Routing techniques specific to parallel machines, e.g. wormhole, store and forward, shortest path problem congestion (routing on a LAN H04L45/00) · CPC title

  • H04L45/745Primary

    Address table lookup; Address filtering · CPC title

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Frequently asked questions

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What does patent US9282037B2 cover?
A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes and a plurality of routers. The routers are operable to route data by selecting from among a plurality of network paths from a target node to a destination node in the dragonfly network based on one or more routing tables.
Who is the assignee on this patent?
Parker Mike, Scott Steve, Cheng Albert, and 2 more
What technology area does this patent fall under?
Primary CPC classification H04L45/745. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).