Radio apparatus

Patent metadata

Field	Value
Publication number	US-9281830-B2
Application number	US-201213421391-A
Country	US
Kind code	B2
Filing date	Mar 15, 2012
Priority date	Dec 22, 2009
Publication date	Mar 8, 2016
Grant date	Mar 8, 2016

Abstract

A radio apparatus includes a first receiver that is a processing unit for amplifying and frequency converting a radio signal received via an antenna, thereby outputting an IF signal; a detector unit for detecting a preamble signal from the IF signal; a second receiver for amplifying and quadrature demodulating the radio signal, thereby generating an I-signal and a Q-signal; a demodulator unit for demodulating the I-signal and Q-signal to generate a data signal; and a control unit for halting the operation of the first receiver and further activating the second receiver when the detector unit detects the preamble signal and for activating the first receiver and halting the operation of the second receiver when the demodulator unit completes the demodulation of the I-signal and Q-signal.

First claim

What is claimed is:

1. A radio apparatus comprising:
a first receiver comprising:
a first amplifier that generates a first amplified signal by amplifying a first radio signal received by an antenna;
a first mixer that generates an IF signal by converting a frequency of the first amplified signal; and
a first filter that suppresses a portion of the IF signal which is outside of a desired band;

a detector that detects a preamble from the IF signal which is outputted from the first receiver;
a second receiver comprising:
a second amplifier that generates a second amplified signal by amplifying a second radio signal received by the antenna, wherein a frequency of the second radio signal is the same as a frequency of the first radio signal;
a second mixer that generates an I signal by converting a frequency of the second amplified signal;
a second filter that suppresses a portion of the I signal which is outside of a desired band;
a third mixer that generates a Q signal by converting the frequency of the second amplified signal; and
a third filter that suppresses a portion of the Q signal which is outside of a desired band;

a demodulator that demodulates the I signal and the Q signal each of which is outputted from the second receiver; and
a controller that halts the operation of the first receiver and activates the second receiver when the detector detects the preamble, and activates the first receiver and halts the operation of the second receiver during standby time;
wherein the first filter has a first capacitor and a first resistance, to filter the IF signal; and
wherein each of the second filter and the third filter includes (i) a second capacitor having a value larger than the first capacitor, and (ii) a second resistance having a resistance value smaller than the first resistance, to filter the I signal and the Q signal, respectively.

2. The radio apparatus as set forth in claim 1 , further comprising a local frequency generator that generates a local oscillation signal and supplies the local oscillation signal to (i) the first mixer which is included in the first receiver and which generates the IF signal, (ii) the second mixer which is included in the second receiver and which generates the I signal, and (iii) the third mixer which is included in the second receiver and which generates the Q signal.

3. The radio apparatus as set forth in claim 2 , wherein the local frequency generator comprises:
a voltage controlled oscillator that generates the local oscillation signal based on a control signal;
a frequency divider that frequency-divides the local oscillation signal to generate a divided signal;
a phase comparator that compares the divided signal and a reference signal;
a filter that filters a comparison result of the phase comparator to generate the control signal;
a signal holder that holds the control signal generated by the filter; and
a switch that supplies either the control signal generated by the filter or the control signal held by the signal holder to the voltage controlled oscillator, and
wherein the controller controls the switch to supply the control signal held by the signal holder to the voltage controlled oscillator while the first receiver is operating, and to supply the control signal generated by the filter to the voltage controlled oscillator while the second receiver is operating.

4. The radio apparatus as set forth in claim 3 , wherein a power-supply voltage of the first amplifier is lower than a power-supply voltage of the second amplifier.

5. The radio apparatus as set forth in claim 2 , wherein the local frequency generator comprises:
a voltage controlled oscillator that generates the local oscillation signal based on a control signal;
an integer frequency divider that integrally frequency-divides the local oscillator;
a fractional frequency divider that fractionally frequency-divides the local oscillator;
a phase comparator that compares a reference signal and an output of the integer frequency divider or an output of the fractional frequency divider;
a filter that filters a comparison result of the phase comparator to generate the control signal; and
a switch that supplies the output of either the integer frequency divider or the fractional frequency divider to the phase comparator, and
wherein the controller controls the switch to supply the output of the integer frequency divider during the standby time, and to supply the output of the fractional frequency divider when the detector detects the preamble.

6. The radio apparatus as set forth in claim 1 , wherein:
the first mixer, which is included in the first receiver and which generates the IF signal, includes a first transistor; and
each of (i) the second mixer, which is included in the second receiver and which generates the I signal, and (ii) the third mixer, which is included in the second receiver and which generates the Q signal, includes a second transistor having a size larger than a size of the first transistor.

Assignees

• Otaka Shoji
• Yamaji Takafumi
• Sugawara Tsutomu
• Tanabe Yasuhiko
• Hosoya Masahiro
• Sakurai Hiroki
• Toshiba Kk

Inventors

• Otaka Shoji
• Yamaji Takafumi
• Sugawara Tsutomu
• Tanabe Yasuhiko
• Hosoya Masahiro
• Sakurai Hiroki

Classifications

• H03L7/18 Primary

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H04W52/0229

  where the received signal is a wanted signal · CPC title

• H04L27/38

  Demodulator circuits; Receiver circuits · CPC title

• H03L7/0802

  the loop being adapted for reducing power consumption (H03L7/14 takes precedence) · CPC title

• H04L27/3818

  using coherent demodulation, i.e. using one or more nominally phase synchronous carriers (H04L27/227 and H04L27/389 take precedence) · CPC title