Current re-using wideband low-noise active balun

US9281787B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9281787-B2
Application numberUS-201514727262-A
CountryUS
Kind codeB2
Filing dateJun 1, 2015
Priority dateMar 12, 2013
Publication dateMar 8, 2016
Grant dateMar 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Some aspects of the present disclosure relate to a low-noise amplifier (LNA) having a balun configuration. The LNA includes a DC current path coupling a first DC supply node to a second DC supply node. First and second output nodes and first and second input nodes are spaced apart along a length of the DC current path. A single-ended radio frequency (RF) input terminal is configured to deliver a single-ended RF signal to the first and second input nodes. A differential RF output terminal is made up of the first and second output nodes. The first and second output nodes are configured to cooperatively establish a differential output signal based on the single-ended RF signal. Other devices and methods are also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1. A low-noise amplifier (LNA) having a balun configuration, comprising: a DC current path coupling a first DC supply node to a second DC supply node, wherein first and second output nodes and first and second input nodes are spaced apart along a length of the DC current path; a single-ended radio frequency (RF) input terminal configured to deliver a single-ended RF signal to the first and second input nodes; and a differential RF output terminal made up of the first and second output nodes, wherein the first and second output nodes are configured to cooperatively establish a differential output signal based on the single-ended RF signal; a virtual AC ground point arranged between the first and second output nodes, wherein a capacitor couples the virtual AC ground point to the second DC supply node; wherein the first DC supply node is a VDD supply node and wherein the second DC supply node is a ground or VSS supply node; wherein the DC current path comprises an RF choke arranged between the first input node and the VDD supply node. 2. The LNA of claim 1 , wherein the first input node corresponds to a source of a common-gate amplifier on the DC current path, and wherein the second input node corresponds to a gate of a common-source amplifier on the DC current path. 3. The LNA of claim 1 , wherein the first input node corresponds to a gate of a common-source amplifier on the DC current path, and wherein the second input node corresponds to a source of a common-gate amplifier on the DC current path. 4. The LNA of claim 1 , wherein the RF choke comprises an inductor. 5. The LNA of claim 1 , wherein the first input node corresponds to a source of a common-gate amplifier that is part of a first cascode amplifier on the DC current path, and wherein the second input node corresponds to a gate of a common-source amplifier that is part of a second cascode amplifier on the DC current path. 6. The LNA of claim 1 , wherein the first input node corresponds to a gate of a common-source amplifier that is part of a first cascode amplifier on the DC current path, and wherein the second input node corresponds to a source of a common-gate amplifier that is part of a second cascode amplifier on the DC current path. 7. The LNA of claim 1 , further comprising: a first active or passive resistor element coupled between the virtual AC ground point and the first output node; and a second active or passive resistor element coupled between the virtual AC ground point and the second output node. 8. The LNA of claim 1 , further comprising: a first on-chip, passive inductive element coupled between the virtual AC ground point and the first output node; and a second on-chip, passive inductive element coupled between the virtual AC ground point and the second output node. 9. A receiver, comprising: a radio frequency (RF) antenna port on which an RF signal is received; a surface acoustic wave (SAW) filter that filters the received RF signal to provide a single-ended RF signal; and a low-noise amplifier (LNA) having a balun configuration and comprising: a DC current path coupling a first DC supply node to a second DC supply node, wherein first and second input nodes and first and second output nodes are spaced apart along a length of the DC current path; a single-ended RF input terminal at which the single-ended RF signal is received and provided to the first and second input nodes; and a differential RF output terminal made up of the first and second output nodes, wherein the first and second output nodes are configured to cooperatively establish a differential output signal based on the single-ended RF signal; wherein the first and second output nodes are arranged proximate to one another on the DC current path, and wherein the first input node is arranged between the first output node and the first DC supply node, and wherein the second input node is arranged between the second output node and the second DC supply node, and wherein an RF choke is arranged between the first input node and the first DC supply node. 10. The receiver of claim 9 , wherein the LNA comprises: a virtual AC ground point arranged on the DC current path between the first and second output nodes.

Assignees

Inventors

Classifications

  • the amplifier being a low noise amplifier [LNA] · CPC title

  • H03F3/19Primary

    with semiconductor devices only · CPC title

  • the amplifier being designed for audio applications · CPC title

  • Noise reduction and elimination in amplifier · CPC title

  • with field-effect devices · CPC title

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Frequently asked questions

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What does patent US9281787B2 cover?
Some aspects of the present disclosure relate to a low-noise amplifier (LNA) having a balun configuration. The LNA includes a DC current path coupling a first DC supply node to a second DC supply node. First and second output nodes and first and second input nodes are spaced apart along a length of the DC current path. A single-ended radio frequency (RF) input terminal is configured to deliver …
Who is the assignee on this patent?
Intel Mobile Comm Gmbh, Intel Deutschland Gmbh
What technology area does this patent fall under?
Primary CPC classification H03F3/19. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).