Apparatus and method for fabricating wafer

US9281188B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9281188-B2
Application numberUS-201214235354-A
CountryUS
Kind codeB2
Filing dateJul 26, 2012
Priority dateJul 27, 2011
Publication dateMar 8, 2016
Grant dateMar 8, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part, wherein the depositing of the wafer, the annealing of the wafer and the cooling of the wafer are continuously performed. An apparatus for fabricating a wafer according to the embodiment comprises an epi deposition part; an annealing part connected to the epi deposition part; and a cooling part connected to the annealing part.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for fabricating a wafer, the method comprising: depositing an epi layer on a wafer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part; wherein the depositing of the wafer, the annealing of the wafer, and the cooling of the wafer are continuously performed; wherein a passage between the epi disposition part and the annealing part is blocked by a first blocking member, wherein a passage between the annealing part and the cooling part is blocked by a second blocking member, wherein the epi layer is a silicon carbide epi layer, wherein a growth temperature of the epi deposition part is in a range of from about 1300° C. to about 1700° C., wherein the epi deposition part deposits a silicon carbide epi layer, wherein the wafer is transferred by a wafer transfer apparatus, and wherein the wafer transfer apparatus is formed of a material that endures the growth temperature of the range of from about 1300° C. to about 1700° C. 2. A method for fabricating a wafer, the method comprising: depositing an epi layer on a wafer in an epi deposition part; transferring the wafer to a cooling part connected to the epi deposition part; and cooling the wafer in the cooling part; wherein the depositing of the wafer and the cooling of the wafer are continuously performed, wherein a passage between the epi deposition part and the cooling part is blocked by a blocking member, wherein the epi layer is a silicon carbide epi layer, wherein a growth temperature of the epi deposition part is in a range of from about 1300° C. to about 1700° C., wherein the wafer is transferred by a wafer transfer apparatus, and wherein the wafer transfer apparatus is formed of a material that endures the growth temperature of the range of from about 1300° C. to about 1700° C. 3. An apparatus for fabricating a wafer, the apparatus comprising: an epi deposition part; an annealing part connected to the epi deposition part; a cooling part connected to the annealing part; a first blocking member between the epi deposition part and the annealing part; a second blocking member between the annealing part and the cooling part; and a wafer transfer apparatus connected to lower portions of the epi deposition part, the annealing part, and the cooling part; wherein the epi deposition part deposits a silicon carbide epi layer, wherein the wafer is transferred by a wafer transfer apparatus, wherein the wafer transfer apparatus is formed of a material that endures a growth temperature in a range of from about 1300° C. to about 1700° C. 4. An apparatus for fabricating a wafer, the apparatus comprising: an epi deposition part; a cooling part connected to the epi deposition part; a blocking member between the epi deposition part and the cooling part; a wafer transfer apparatus connected to lower portions of the epi deposition part and the cooling part; and wherein the epi deposition part deposits a silicon carbide epi layer. 5. The method of claim 4 , wherein the annealing of the wafer is performed at a temperature higher than a deposition temperature by about 100° C. to about 200° C.

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9281188B2 cover?
A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part, wherein the depositi…
Who is the assignee on this patent?
Kang Seok Min, Kim Moo Seong, Lg Innotek Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).