Semiconductor structure and method for manufacturing semiconductor structure
US-12046478-B2 · Jul 23, 2024 · US
US9281188B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9281188-B2 |
| Application number | US-201214235354-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 26, 2012 |
| Priority date | Jul 27, 2011 |
| Publication date | Mar 8, 2016 |
| Grant date | Mar 8, 2016 |
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A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part, wherein the depositing of the wafer, the annealing of the wafer and the cooling of the wafer are continuously performed. An apparatus for fabricating a wafer according to the embodiment comprises an epi deposition part; an annealing part connected to the epi deposition part; and a cooling part connected to the annealing part.
Opening claim text (preview).
The invention claimed is: 1. A method for fabricating a wafer, the method comprising: depositing an epi layer on a wafer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part; wherein the depositing of the wafer, the annealing of the wafer, and the cooling of the wafer are continuously performed; wherein a passage between the epi disposition part and the annealing part is blocked by a first blocking member, wherein a passage between the annealing part and the cooling part is blocked by a second blocking member, wherein the epi layer is a silicon carbide epi layer, wherein a growth temperature of the epi deposition part is in a range of from about 1300° C. to about 1700° C., wherein the epi deposition part deposits a silicon carbide epi layer, wherein the wafer is transferred by a wafer transfer apparatus, and wherein the wafer transfer apparatus is formed of a material that endures the growth temperature of the range of from about 1300° C. to about 1700° C. 2. A method for fabricating a wafer, the method comprising: depositing an epi layer on a wafer in an epi deposition part; transferring the wafer to a cooling part connected to the epi deposition part; and cooling the wafer in the cooling part; wherein the depositing of the wafer and the cooling of the wafer are continuously performed, wherein a passage between the epi deposition part and the cooling part is blocked by a blocking member, wherein the epi layer is a silicon carbide epi layer, wherein a growth temperature of the epi deposition part is in a range of from about 1300° C. to about 1700° C., wherein the wafer is transferred by a wafer transfer apparatus, and wherein the wafer transfer apparatus is formed of a material that endures the growth temperature of the range of from about 1300° C. to about 1700° C. 3. An apparatus for fabricating a wafer, the apparatus comprising: an epi deposition part; an annealing part connected to the epi deposition part; a cooling part connected to the annealing part; a first blocking member between the epi deposition part and the annealing part; a second blocking member between the annealing part and the cooling part; and a wafer transfer apparatus connected to lower portions of the epi deposition part, the annealing part, and the cooling part; wherein the epi deposition part deposits a silicon carbide epi layer, wherein the wafer is transferred by a wafer transfer apparatus, wherein the wafer transfer apparatus is formed of a material that endures a growth temperature in a range of from about 1300° C. to about 1700° C. 4. An apparatus for fabricating a wafer, the apparatus comprising: an epi deposition part; a cooling part connected to the epi deposition part; a blocking member between the epi deposition part and the cooling part; a wafer transfer apparatus connected to lower portions of the epi deposition part and the cooling part; and wherein the epi deposition part deposits a silicon carbide epi layer. 5. The method of claim 4 , wherein the annealing of the wafer is performed at a temperature higher than a deposition temperature by about 100° C. to about 200° C.
using chemical vapour deposition [CVD] · CPC title
Silicon carbide · CPC title
of semiconductor materials · CPC title
Electricity · mapped topic
Electricity · mapped topic
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