Super short channel nor flash cell array and programming method thereof
US-2024233829-A9 · Jul 11, 2024 · US
Method of programming a nonvolatile memory device
US9281069B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9281069-B2 |
| Application number | US-201414274041-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 9, 2014 |
| Priority date | Dec 30, 2010 |
| Publication date | Mar 8, 2016 |
| Grant date | Mar 8, 2016 |
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Abstract
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In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of programming a nonvolatile memory device including a plurality of multi-level cells coupled to a wordline, the method comprising: performing a least significant bit (LSB) program operation that programs LSBs of 2-bit data in the plurality of multi-level cells; and performing a most significant bit (MSB) program operation that programs MSBs of the 2-bit data in the plurality of multi-level cells, the MSB program operation including, an MSB pre-…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G11C16/12Primary
Physics · mapped topic
- G11C11/5628Primary
Physics · mapped topic
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- What does patent US9281069B2 cover?
- In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in th…
- Who is the assignee on this patent?
- Jang Joon-Suc, Kwak Dong-Hun, Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G11C16/12. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).