Controlling operation of a run-time instrumentation facility from a lesser-privileged state

US9280448B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9280448-B2
Application numberUS-201313792268-A
CountryUS
Kind codeB2
Filing dateMar 11, 2013
Priority dateMar 16, 2012
Publication dateMar 8, 2016
Grant dateMar 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrumentation facility are valid. The run-time instrumentation facility is disabled based on the instruction being a run-time instrumentation facility off (RIOFF) instruction. The disabling includes updating a bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor. The run-time instrumentation facility is enabled based on the instruction being a run-time instrumentation facility on (RION) instruction. The enabling includes updating the bit in the PSW to indicate that run-time instrumentation data should be captured by the processor.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for enabling and disabling execution of a run-time instrumentation facility on a processor, the method comprising: fetching, by a processor, an instruction of a currently executing thread in a multi-threaded environment for execution by the processor in a first state, the instruction one of a run-time instrumentation facility off (RIOFF) instruction and a run-time instrumentation facility on (RION) instruction; based on determining, by the processor, that the run-time instrumentation facility permits execution of the instruction in the first state and that controls associated with the run-time instrumentation facility are valid, executing the instruction, the executing comprising any one of: disabling the run-time instrumentation facility based on the instruction being the RIOFF instruction, the disabling including updating a run-time instrumentation facility state bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor; and enabling the run-time instrumentation facility based on the instruction being the RION instruction, the enabling including updating the run-time instrumentation facility state bit in the PSW to indicate that run-time instrumentation data should be captured by the processor, wherein the PSW is associated with the executing thread, and a state of the run-time instrumentation facility for the executing thread is maintained in the PSW across dispatches of the executing thread. 2. The method of claim 1 , further comprising: fetching, by the processor, a run-time instrumentation control block (RICCB) that includes a problem state execution control bit previously set to a value by a program executing in a privileged state, wherein the determining that the run-time instrumentation facility permits execution of the instruction in the first state is based on the value of the problem state execution control bit, wherein the first state is different than the privilege state. 3. The method of claim 1 , further comprising: fetching, by the processor, a run-time instrumentation control block (RICCB) that includes a validity bit previously set to a value by a program executing in a privileged state, wherein the determining that controls associated with the run-time instrumentation facility are valid is based on the value of the validity bit. 4. The method of claim 1 , further comprising, based on the enabling: capturing, by the processor, the run-time instrumentation data based on an instruction stream of instructions of an application program executing on the processor, the capturing comprising storing the run-time instrumentation data in a collection buffer of the processor; detecting, by the processor, a run-time instrumentation sample point trigger; and copying contents of the collection buffer into a program buffer as a reporting group based on the detecting the run-time instrumentation sample point trigger, the program buffer located in main storage in an address space that is accessible by the application program. 5. The method of claim 4 , further comprising capturing, in the collection buffer, instruction addresses and metadata corresponding to events detected during the executing of the instruction stream. 6. The method of claim 4 , wherein the reporting group includes a predetermined number of one or more instrumentation records comprising contents of the collection buffer and system information records. 7. The method of claim 4 , wherein the copying includes copying the reporting group into the program buffer starting at a current address of the program buffer, the program buffer stored at a program buffer origin address specified by an instruction accessible control block that also specifies an address of a last byte in the program buffer and the current address in the program buffer. 8. The method of claim 1 , further comprising: saving a remaining sample interval count (RSIC) field based on the disabling; fetching, by the processor, a RION instruction; and restoring the RSIC field.

Assignees

Inventors

Classifications

  • Special purpose registers · CPC title

  • G06F11/34Primary

    Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation {; Recording or statistical evaluation of user activity, e.g. usability assessment} · CPC title

  • by instrumenting at runtime · CPC title

  • using additional hardware · CPC title

  • by tracing the execution of the program · CPC title

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Frequently asked questions

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What does patent US9280448B2 cover?
Aspects relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrume…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F11/34. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).