Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata

US9280397B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9280397-B2
Application numberUS-63809809-A
CountryUS
Kind codeB2
Filing dateDec 15, 2009
Priority dateJun 27, 2007
Publication dateMar 8, 2016
Grant dateMar 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.

First claim

Opening claim text (preview).

What is claimed is: 1. A non-transient machine readable medium including program code which, when executed by a machine, causes the machine to perform, before executing a transactional memory access operation referencing a data address, the operations of: loading a value of a hardware monitor associated with metadata, the metadata to be associated with the data address and the value to include at least a resource ID representing at least one of a core or thread that performed a prior access operation referencing the data address during the pendency of the transactional memory access operation and a corresponding state representing whether the prior access operation included a read operation and a write operation; executing an access barrier operation in response to the value representing a default value, the default value indicating that a memory access to the data address is not a redundant memory access occurring during the pendency of the transactional memory access operation; accelerating execution of the transactional memory access operation by not executing the access barrier operation in response to the value representing a previously accessed value, the previously accessed value indicating that the memory access is a redundant memory access occurring during the pendency of the transactional memory access operation; and executing the transactional memory access operation referencing said data address regardless of said value of said hardware monitor. 2. The machine readable medium of claim 1 , wherein the transactional memory access operation includes a transactional read within a transaction, the metadata includes a transaction record, the hardware monitor includes a hardware read monitor, and wherein the access barrier operation is selected from a group consisting of logging the transaction record in a read set for the transaction, setting the hardware read monitor to the previously accessed value, and performing on-demand validation for the transactional read. 3. The machine readable medium of claim 2 , wherein the program code, when executed by the machine, further causes the machine to perform the operations of: clearing the hardware read monitor to the default value during a commit of the transaction. 4. The machine readable medium of claim 1 , wherein the transactional memory access operation includes a transactional write within a transaction, the metadata includes a transaction record, the hardware monitor includes a hardware write monitor, and wherein the access barrier operation is selected from a group consisting of logging the transaction record in a write set for the transaction, setting the hardware write monitor to the previously accessed value, and acquiring a transactional lock in the transaction record. 5. The machine readable medium of claim 1 , wherein the program code includes library code and application code, the library code having an access barrier function including the access barrier operation and the main code having a call to the access barrier function before the transactional access operation, wherein the call to the access barrier function in the application code, when executed, causes the machine to execute the access barrier function included in the library code, the access barrier function, when executed, causes the machine to perform, before executing a transactional memory access operation referencing a data address, the operations of loading the value of the hardware monitor, executing the access barrier operation, and not executing the access barrier operation. 6. A method comprising: determining a value of a hardware monitor associated with a cache line holding a transaction record for a data object referenced by a transactional read within a transaction, the value including at least a resource ID representing at least one of a core or thread that performed a prior access operation referencing the data object during the pendency of the transaction and a corresponding state representing whether the prior access operation included a read operation and a write operation; logging the transaction record in a read set associated with the transaction in response to determining the value of the hardware monitor includes a first value, the first value indicating that a transactional read is not a redundant memory access occurring during the pendency of the transaction; accelerating execution of the transaction by eliding the logging of the transaction record in the read set associated with the transaction in response to determining the value of the hardware monitor includes a second value, the second value indicating that the transactional read is a redundant memory access occurring during the pendency of the transaction; and loading the data object responsive to executing the transaction read irrespective of the value of said hardware monitor. 7. The method of claim 6 , further comprising checking that no other transaction owns the transaction record and validating a read set in response to determining the value of the hardware monitor includes the first value; and eliding the checking that no other processing element owns the transaction record and validating the read set in response to determining the value of the hardware monitor includes the second value. 8. The method of claim 6 , wherein the hardware monitor includes an attribute bit associated with the cache line. 9. The method of claim 6 , wherein the hardware monitor includes a read monitor to track reads to the cache line. 10. The method of claim 6 , wherein the data object referenced by the transactional read comprises the transactional read referencing a data address for the data object, and wherein the transaction record for the data object comprises a hash value of the data address for the data object referencing the transaction record. 11. The method of claim 6 , further comprising updating the hardware monitor to the second value in response determining the value of the hardware monitor includes the first value. 12. The method of claim 6 , wherein a machine readable medium includes program code, which when executed by a machine, is to cause the machine to perform the method of claim 6 . 13. A non-transient machine readable medium including program code which, when executed by a machine, causes the machine to perform, before executing a transactional memory access operation referencing a data address, the operations of: loading a value of an ephemeral filter field associated with metadata, the metadata to be associated with the data address and the value to include at least a resource ID representing at least one of a core or thread that performed a prior access operation referencing the data address during the pendency of the transactional memory access operation and a corresponding state representing whether the prior access operation included a read operation and a write operation; executing an access barrier operation in response to the value representing a default value, the default value indicating that a memory access to the data address is not a redundant memory access occurring during the pendency of the transactional memory access operation; accelerating execution of the transactional memory access operation by not executing the access barrier operation in response to the value representing a previously accessed value, the previously accessed value indicating that the memory access is a redundant memory access occurring during the pendency of the transactional memory access operation; and executing the transactional memory access operation regardless of the value of the ephemeral filter field. 14. The machine readable medium

Assignees

Inventors

Classifications

  • Monitoring of transactions · CPC title

  • Program synchronisation; Mutual exclusion, e.g. by means of semaphores · CPC title

  • Address tracing · CPC title

  • Synchronisation, e.g. post-wait, barriers, locks (synchronisation among tasks G06F9/52) · CPC title

  • Monitoring of software · CPC title

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Frequently asked questions

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What does patent US9280397B2 cover?
A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transactio…
Who is the assignee on this patent?
Adl-Tabatabai Ali-Reza, Sheaffer Gad, Saha Bratin, and 5 more
What technology area does this patent fall under?
Primary CPC classification G06F9/522. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).