Configuration based on chassis identifications

Patent metadata

Field	Value
Publication number	US-9280357-B2
Application number	US-201114126844-A
Country	US
Kind code	B2
Filing date	Jul 12, 2011
Priority date	Jul 12, 2011
Publication date	Mar 8, 2016
Grant date	Mar 8, 2016

Abstract

Techniques for configuration are provided. A chassis ID identifies a chassis type. A device, such as a circuit board, may receive the chassis ID from the chassis. The device may be configured based on the chassis type.

First claim

We claim:

1. A circuit board comprising:
a plurality of components to operate a plurality of computing device types;
a power switch to enable or disable at least one of the plurality of components; and
an input interface to receive a chassis ID, upon powering the circuit board, the chassis ID identifying a respective one of the plurality of computing device types in which the circuit board is installed;
wherein, based on the chassis ID, the power switch is to automatically enable or disable the at least one component;
wherein the plurality of components comprise a first video output type requiring a first power input, a second video output type operable by the first power input and a second power input, and a multiplexor to receive the chassis ID and select one of the first or the second video output types based on the chassis ID.

2. The circuit board of claim 1 , wherein the plurality of components further comprise a memory to store a plurality of instruction sets and a processor to receive the chassis ID, and wherein the chassis ID further causes the processor to execute a respective one of the plurality of instruction sets based on the chassis ID, the respective instruction set being specific to operating the respective computing device type.

3. The circuit board of claim 1 , wherein the first video output type is a video graphics array (VGA) requiring wall outlet power, and wherein the second video output type is a digital video interface (DVI) operable by the wall outlet power and power from a power over Ethernet (PoE) connection.

4. The circuit board of claim 1 , wherein the chassis ID is received via a signal line coupled to the circuit board, the chassis ID providing a voltage level that engages or disengages the power switch.

5. A computing device comprising:
a chassis for a type of the computing device;
a memory to store a plurality of instruction sets;
a processor to receive a chassis ID for the computing device and execute a respective one of the plurality of instructions sets based on the chassis ID, the chassis ID identifying the type of the computing device, the respective instruction set being specific to operating the respective computing device type; and
a circuit board comprising:
a plurality of components to operate a plurality of computing device types;
a power switch to enable or disable at least one of the plurality of components; and
an input interface to receive the chassis ID, upon powering the circuit board, and transmit the chassis ID to the processor;
a video graphics array (VGA) requiring a first power input; and
a digital video interface (DVI) operable by the first power input and a second power input;
wherein, based on the chassis ID, the power switch is to automatically enable or disable the at least one component.

6. The computing device of claim 5 , wherein the VGA outputs to a field programmable gate array (FPGA) and a VGA transmitter, the FPGA and the VGA transmitter operable by the power switch, and wherein the power switch comprises a power transistor to enable the FPGA and the VGA transmitter based on the chassis ID.

7. The computing device of claim 6 , wherein the power transistor comprises an N type MOSFET to provide power to the FPGA when the chassis ID indicates that the VGA output is to be enabled.

8. The computing device of claim 5 , wherein the first power input comprises wall outlet power, and wherein the second power input comprises power from a power over Ethernet (PoE) connection.

9. The computing device of claim 5 wherein the chassis ID is received via a signal line coupled to the circuit board, the chassis ID providing a voltage level that engages or disengages the power switch.

10. A method for configuring a circuit board, the method performed by a processor of the circuit board and comprising:
receiving a chassis ID at the processor, the chassis ID identifying a respective one of a plurality of computing device types in which the circuit board is installed; and
based on the chassis ID, executing a respective set of instructions in a memory of the circuit board, the memory storing a plurality of sets of instructions each being associated with a specified computing device type, the respective set of instructions being specific to operating the respective computing device type in which the circuit board is installed;
wherein the processor includes a video out interface connected to a multiplexor, the multiplexor configured to select between a first video output type and a second video output type;
wherein the respective set of instructions, when executed by the processor, cause the processor to:
based on the chassis ID, configure the video out interface to cause the multiplexor to select one of the first video output type or the second video output type; and

wherein the first video output type comprises a video graphics array (VGA) requiring a first power input, and wherein the second video output type comprises a digital video interface (DVI) operable by the first power input and a second power input.

Assignees

• Shaver Charles N
• Brooks Robert C
• Hewlett Packard Development Co

Inventors

• Shaver Charles N
• Brooks Robert C

Classifications

• G06F1/182 Primary

  with special features, e.g. for use in industrial environments; grounding or shielding against radio frequency interference [RFI] or electromagnetical interference [EMI] · CPC title

• G06F9/4411 Primary

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F13/102

  where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title