Method and apparatus to reduce idle link power in a platform

Patent metadata

Field	Value
Publication number	US-9280198-B2
Application number	US-201414148530-A
Country	US
Kind code	B2
Filing date	Jan 6, 2014
Priority date	Jul 1, 2011
Publication date	Mar 8, 2016
Grant date	Mar 8, 2016

Abstract

A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.

First claim

What is claimed is:

1. An apparatus comprising:
a port comprising logic, implemented at least in part in hardware, to:
receive a message to indicate a service latency requirement of another port;
determine whether the apparatus is in a first link state;
determine whether an indication that the apparatus is to transition to a second link state has been received in response to a determination that the apparatus is in the first link state;
determine that the service latency requirement is less than a threshold value; and
transition from the first link state to the second link state based on a determination that the indication has been received and the determination that the service latency requirement is less than the threshold value.

2. The apparatus of claim 1 , wherein the logic to transition from the first link state to the second link state is to:
disable one or more of a receiver circuitry, a transmitter circuitry, a phase locked loop (PLL), an Electrical Idle (EI) exit detect circuitry and an Alternating Current (AC) common mode circuitry.

3. The apparatus of claim 1 , wherein the second link state is to consume less power than the first link state.

4. The apparatus of claim 1 , wherein the port comprises an upstream port and the other port comprises a downstream port, wherein the indication comprises a signal coupled with the upstream port and the downstream port, and wherein the logic to determine whether the indication that the apparatus is to transition to the second link state has been received is to determine whether a setting of the signal has been asserted.

5. The apparatus of claim 1 , wherein the apparatus is compliant at least in part with a Peripheral Component Interface Express (PCIe) standard.

6. An apparatus comprising:
an upstream port to:
receive a message to indicate a service latency requirement of a downstream port, wherein the upstream port and downstream port are coupled by a link;
identify whether the link is in a first link state;
determine whether a service latency requirement of a downstream port coupled with the upstream port is less than a threshold; and
transition from a first link state to a second link state in response to a determination that the service latency requirement of the downstream port coupled with the upstream port is less than the threshold.

7. The apparatus of claim 6 , wherein the upstream port to transition from the first link state to the second link state is to:
disable an Alternating Current (AC) common mode circuitry of upstream port.

8. The apparatus of claim 7 , wherein the upstream port is further to:
disable one or more of a receiver circuitry, a transmitter circuitry, an Electrical Idle (EI) exit detect circuitry and a reference clock signal.

9. The apparatus of claim 6 , wherein the upstream port is further to:
determine whether an indication that the apparatus is to transition to the second link state has been received, and
wherein the upstream port to transition from the first link state to the second link state in response to the determination that the service latency requirement of the downstream port coupled with the upstream port is less than the threshold is to:
transition from the first link state to the second link state in response to the determination that the service latency requirement of the downstream port coupled with the upstream port is less than the threshold and a determination that the indication that the apparatus is to transition to the second link state has been received.

10. The apparatus of claim 9 , wherein the indication comprises a signal coupled with the upstream port and the downstream port, and wherein the upstream port to determine whether the indication that the apparatus is to transition to the second link state has been received is to determine whether a setting of the signal has been asserted.

11. The apparatus of claim 6 , wherein the apparatus is compliant at least in part with a Peripheral Component Interface Express (PCIe) standard.

12. The apparatus of claim 11 , wherein the upstream port is further to:
receive a Latency Tolerance Reporting (LTR) message from the downstream port, wherein the service latency requirement of the downstream port requirement is part of the LTR message.

13. A method comprising:
receiving a message to indicate a service latency requirement of another port;
determining whether an apparatus is in a first link state;
determining whether an indication that the apparatus is to transition to a second link state has been received in response to a determination that the apparatus is in the first link state;
determining that the service latency requirement is less than a threshold value; and
transitioning from the first link state to the second link state based on a determination that the indication has been received and the determination that the service latency requirement is less than the threshold value.

14. The method of claim 13 , wherein transitioning from the first link state to the second link state in response to the determination that the indication has been received comprises:
disabling one or more of a receiver circuitry, a transmitter circuitry, a phase locked loop (PLL), an Electrical Idle (EI) exit detect circuitry and an Alternating Current (AC) common mode circuitry.

15. The method of claim 13 , wherein the second link state is to consume less power than the first link state.

16. The method of claim 13 , wherein determining whether the indication that the apparatus is to transition to the second link state has been received in response to the determination that the apparatus is in the first link state comprises determining whether a setting of a signal has been asserted.

17. The method of claim 13 , further comprising:
receiving a Latency Tolerance Reporting (LTR) message from the downstream port, wherein the service latency requirement of the downstream port requirement is part of the LTR message.

18. The method of claim 13 , wherein the apparatus is compliant at least in part with a Peripheral Component Interface Express (PCIe) standard.

Assignees

• Intel Corp

Inventors

• Diefenbaugh Paul S
• Gough Robert E
• Bachrach Yuval
• Hunsaker Mikal C
• Ben-Tal Rafi
• Pardo Ilan
• Prat Gideon
• Harriman David J

Classifications

• G06F1/3278

  Power saving in modem or I/O interface · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• Y02B60/126

  Cross-Sectional Technologies · mapped topic

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• Y02B60/1282

  Cross-Sectional Technologies · mapped topic