Multi-chip socket

Patent metadata

Field	Value
Publication number	US-9277678-B2
Application number	US-201414323614-A
Country	US
Kind code	B2
Filing date	Jul 3, 2014
Priority date	Jun 29, 2012
Publication date	Mar 1, 2016
Grant date	Mar 1, 2016

Abstract

A multi-chip socket including multiple cavities. The multiple cavities include support surfaces. The support surfaces may be disposed at different heights relative to a reference plane. A first thermal interface is to thermally contact a top surface of the first component, and a second thermal interface is to thermally contact a top surface of the second component.

First claim

What is claimed is:

1. An apparatus comprising:
a multi-chip socket comprising:
a first cavity having a first support surface to support a first component including a first chip, the first support surface arranged to contact and support the first chip, and the first support surface being at a first height with respect to a reference plane;
a second cavity electrically coupled to the first cavity and having a second support surface to support a second component including a second chip, the second support surface arranged to contact and support the second chip, and the second support surface being at a second, different height with respect to the reference plane;
a first thermal interface to thermally contact a top surface of the first component;
a second thermal interface to thermally contact a top surface of the second component; and

a heat extraction device arranged to thermally connect to a top surface of the first thermal interface and a top surface of the second thermal interface, the top surfaces of the first thermal interface and the second thermal interface being coplanar.

2. The apparatus of claim 1 , wherein the first chip includes a first integrated circuit (IC) chip, and the second chip includes a second IC chip.

3. The apparatus of claim 1 , wherein the first height is a height of the first support surface above the reference plane, and the second height is a height of the second support surface above the reference plane.

4. The apparatus of claim 3 , wherein the reference plane corresponds to a surface of a substrate on which the multi-chip socket is to be mounted.

5. The apparatus of claim 1 , wherein the first height defines a first depth of the first cavity, and the second height defines a second, different depth of the second cavity.

6. The apparatus of claim 1 , wherein the first thermal interface has a first thickness, and the second thermal interface has a second, different thickness, wherein the first thickness and the second thickness are provided such that the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

7. The apparatus of claim 1 , wherein the first height and the second height are provided such that the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

8. A system, comprising:
a multi-chip socket including a first cavity and a second cavity;
a first component including a first integrated circuit (IC) chip disposed within the first cavity, wherein a first support surface of the first cavity is in a first plane, and the first support surface is in contact with and supports the first IC chip;
a second component including a second IC chip communicatively coupled to the first component and disposed within the second cavity, wherein a second support surface of the second cavity is in a second plane that is different than the first plane, and the second support surface is in contact with and supports the second IC chip;
a first thermal interface in contact with a top surface of the first component;
a second thermal interface in contact with a top surface of the second component; and
a single heat extraction device thermally connected to a top surface of the first thermal interface and a top surface of the second thermal interface, wherein the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

9. The system of claim 8 , wherein the first IC chip is a processor and the second IC chip is a memory device.

10. The system of claim 8 , wherein the first IC chip is an application specific integrated circuit (ASIC) and the second IC chip is an electrical/optical (E/O) engine.

11. The system of claim 8 , further comprising a printed circuit board on which the multi-chip socket is disposed, wherein the first plane is at a first height above a surface of the printed circuit board, and the second plane is at a second, different height above the surface of the printed circuit board.

12. The system of claim 11 , wherein the first height defines a first depth of the first cavity, and the second height defines a second, different depth of the second cavity.

13. The system of claim 8 , wherein the first thermal interface has a first thickness, and the second thermal interface has a second, different thickness, wherein the first thickness and the second thickness are provided such that the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

14. The system of claim 11 , wherein the first height and the second height are provided such that the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

15. A method comprising:
arranging a multi-chip socket on a circuit board, wherein the multi-chip socket comprises:
a first cavity having a first support surface to support a first component including a first chip, the first support surface arranged to contact and support the first chip, and the first support surface being at a first height with respect to a reference plane;
a second cavity having a second support surface to support a second component including a second chip, the second support surface arranged to contact and support the second chip, and the second support surface being at a second, different height with respect to the reference plane;
a first thermal interface in contact with a top surface of the first component;
a second thermal interface in contact with a top surface of the second component; and
a second thermal interface in contact with a top surface of the second component; and

thermally connecting a single heat extraction device to a top surface of the first thermal interface and a top surface of the second thermal interface, the top surfaces of the first thermal interface and the second thermal interface being coplanar.

16. The apparatus of claim 1 , wherein the heat extraction device includes a single heat sink contacted to the top surface of the first thermal interface, and the top surface of the second thermal interface.

17. The system of claim 8 , wherein the single heat extraction device includes a single heat sink thermally connected to the top surfaces of the first and second thermal interfaces.

18. The method of claim 15 , wherein the single heat extraction device includes a single heat sink thermally connected to the top surfaces of the first and second thermal interfaces.

19. The method of claim 15 , wherein the first thermal interface has a first thickness, and the second thermal interface has a second, different thickness, wherein the first thickness and the second thickness are provided such that the top surface of the first thermal interface and the top surface of the second thermal interface are coplanar.

Assignees

• Hewlett Packard Development Co
• Hewlett Packard Entpr Dev Lp

Inventors

• Leigh Kevin B
• Megason George D

Classifications

• H10W78/00

  Detachable holders for supporting packaged chips in operation · CPC title

• H10W70/68

  Shapes or dispositions thereof · CPC title

• H10W40/10

  Arrangements for heating · CPC title

• H05K7/10 Primary

  Plug-in assemblages of components {, e.g. IC sockets} · CPC title

• H05K2201/10325

  Sockets, i.e. female type connectors comprising metallic connector elements integrated in, or bonded to a common dielectric support · CPC title