Micro led display panel
US-2024371838-A1 · Nov 7, 2024 · US
US9276167B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9276167-B2 |
| Application number | US-201113820999-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 11, 2011 |
| Priority date | Sep 10, 2010 |
| Publication date | Mar 1, 2016 |
| Grant date | Mar 1, 2016 |
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Official abstract text for this publication.
A light-emitting diode chip is specified, comprising an n-conducting region ( 1 ), a p-conducting region ( 2 ), an active region ( 3 ) between the n-conducting region ( 1 ) and the p-conducting region ( 2 ), a mirror layer ( 4 ) at that side of the p-conducting region ( 2 ) which is remote from the active region ( 3 ), and an insulation layer ( 5 ) formed with an electrically insulating material, wherein the mirror layer ( 4 ) is designed for reflecting electromagnetic radiation generated in the active region ( 3 ), and the mirror layer ( 4 ) has a perforation ( 41 ), wherein a side area ( 4 a ) of the mirror layer ( 4 ) is completely covered by the insulation layer ( 5 ) in the region of the perforation ( 41 ).
Opening claim text (preview).
The invention claimed is: 1. A light-emitting diode chip comprising: an n-conducting region; a p-conducting region; an active region between the n-conducting region and the p-conducting region; a mirror layer at that side of the p-conducting region which is remote from the active region; and an insulation layer formed with an electrically insulating material, wherein the mirror layer is designed for reflecting electromagnetic radiation generated in the active region, wherein the mirror layer has a perforation, wherein a side area of the mirror layer is completely covered by the insulation layer in the region of the perforation, wherein the remaining outer area of the mirror layer is free of the insulation layer, and wherein the insulation layer does not project beyond the mirror layer in a vertical direction. 2. The light-emitting diode chip according to the claim 1 , wherein the insulation layer can be etched by means of an orthophosphoric acid. 3. The light-emitting diode chip according to claim 1 , wherein the insulation layer consists of an amorphous ceramic material. 4. The light-emitting diode chip according to claim 1 , wherein the insulation layer is formed with amorphous Al2O3 or consists of amorphous Al2O3. 5. The light-emitting diode chip according to claim 1 , wherein the perforation adjoins an opening extending through the p-conducting region and the active region right into or as far as the n-conducting region. 6. The light-emitting diode chip according to claim 1 , wherein the perforation and the opening are filled with an electrically conductive material, wherein the insulation layer is arranged between the electrically conductive material and the mirror layer. 7. The light-emitting diode chip according to claim 1 , further comprising: a radiation passage area, which is formed in places by an outer area of the n-conducting region which is remote from the p-conducting region, wherein a current distribution for energizing the active region during the operation of the light-emitting diode chip is effected below the radiation passage area. 8. The light-emitting diode chip according to claim 1 , wherein the mirror layer contains silver or consists of silver. 9. The light-emitting diode chip according to claim 1 , wherein an electrically conductive layer is arranged at that outer area of the mirror layer which is remote from the p-conducting region, said electrically conductive layer projecting beyond the mirror layer, the n-conducting region, the p-conducting region and the active region in a lateral direction, wherein the electrically conductive layer is freely accessible in places at its side facing the mirror layer. 10. The light-emitting diode chip according to claim 1 , wherein the electrically conductive material is separated from the electrically conductive layer in an electrically insulating fashion by means of a passivation layer, wherein the passivation layer has an opening filled with the electrically conductive material. 11. The light-emitting diode chip according to claim 1 , wherein the insulation layer has the same thickness as the mirror layer. 12. The light-emitting diode chip according to claim 1 , wherein an electrically conductive layer is arranged at the outer area of the mirror layer which is remote from the p-conducting region, wherein the electrically conductive material is separated from the electrically conductive layer in an electrically insulating fashion by means of a passivation layer, and wherein the remaining outer areas are free of any electrically insulating material with the exception of the passivation layer. 13. The light-emitting diode chip according to claim 1 , wherein the insulation layer is arranged solely at the side area in the region of the perforation, wherein the mirror layer comprises outer side areas that are free of the insulation layer, and wherein the outer side areas are covered by a further passivation layer. 14. The light-emitting diode chip according to claim 1 , wherein the mirror layer does not project beyond the perforation in the vertical direction. 15. The light-emitting diode chip according to claim 1 , wherein the p-conducting region comprises an inner side face in the region of the perforation, wherein the inner side face of the p-conducting region is covered by a neutralized region, and wherein the neutralized encapsulates the p-conducting region at the inner side face of the p-conducting region. 16. A method for producing a light-emitting diode chip, comprising the following steps: providing a p-doped layer; applying a mirror layer to an outer area of the p-doped layer; uncovering the p-doped layer in places by removing the mirror layer in places; applying an insulation layer into the regions freed of the mirror layer wherein the mirror layer at its side remote from the p doped layer, terminates flush with the insulation layer and side areas of the p-doped layer directly adjoin the insulation layer; applying a carrier at that side of the mirror layer which is remote from the p-doped layer; and removing the insulation layer in places in order to produce a hollow groove between the carrier and the p-doped layer, wherein the insulation layer does not project beyond the mirror layer in a vertical direction. 17. The method according to claim 16 , wherein the hollow groove is completely filled with a passivation material for forming a further passivation layer. 18. A light-emitting diode chip comprising: an n-conducting region; a p-conducting region; an active region between the n-conducting region and the p-conducting region; a mirror layer at that side of the p-conducting region which is remote from the active region; an insulation layer formed with an electrically insulating material; and an electrically conductive layer at that side of the mirror layer which is remote from the p-conducting region; wherein the mirror layer is designed for reflecting electromagnetic radiation generated in the active region, wherein the mirror layer has a perforation, wherein the mirror layer has an inner side area in the region of the perforation and a bottom area which is remote from the p-conducting region; wherein the inner side area of the mirror layer is completely covered by the insulation layer, wherein the bottom area of the mirror layer is in direct contact with an electrically conductive layer, wherein substantially the entire bottom area is covered by the electrically conductive layer, and wherein the mirror layer is not freely accessible or all outer areas of the mirror layer are completely covered by at least one component of the light-emitting diode chip. 19. The light-emitting diode chip according to claim 18 , wherein the bottom area of the mirror layer is free of the insulation layer.
Current-blocking structures · CPC title
containing nitrogen, e.g. GaN · CPC title
Roughened surfaces, e.g. at the interface between epitaxial layers · CPC title
Bonding of wafers · CPC title
extending at least partially through the bodies · CPC title
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