Semiconductor device structures including metal oxide structures

US9276059B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9276059-B2
Application numberUS-201414176574-A
CountryUS
Kind codeB2
Filing dateFeb 10, 2014
Priority dateApr 18, 2007
Publication dateMar 1, 2016
Grant dateMar 1, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device structure comprising: metal oxide structures within at least one trench in a material overlying a substrate, each of the metal oxide structures comprising: a first polymer material; and a metal oxide within the first polymer material; and a second polymer material between the metal oxide structures and a lower surface of the at least one trench wherein upper surfaces of the metal oxide structures are below an upper surface of the material outside of the at least one trench. 2. The semiconductor device structure of claim 1 , wherein the metal oxide structures extend parallel to sidewalls of the at least one trench. 3. The semiconductor device structure of claim 1 , wherein the metal oxide structures extend a length of the at least one trench. 4. The semiconductor device structure of claim 1 , wherein the metal oxide structures comprise lamella or horizontal cylinders. 5. The semiconductor device structure of claim 1 , wherein the metal oxide structures comprise at least one of titanium and silicon. 6. The semiconductor device structure of claim 1 , wherein the metal oxide structures comprise a titanium oxide. 7. The semiconductor device structure of claim 1 , further comprising silicon dioxide on sidewalls and a lower surface of the at least one trench. 8. A semiconductor device structure comprising: a silicon dioxide material over a substrate; and an array of evenly spaced polymer structures within trenches in the silicon dioxide material, each polymer structure of the array of evenly spaced polymer structures comprising: an upper region comprising at least one of a silicon oxide and a titanium oxide; and a lower region substantially free of the at least one of the silicon oxide and the titanium oxide and comprising a polymer. 9. The semiconductor device structure of claim 8 , wherein the upper region of each polymer structure of the array of evenly spaced polymer structures is substantially free of the polymer.

Assignees

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Classifications

  • the substance being oxygen · CPC title

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

  • H10P76/20Primary

    of masks comprising organic materials · CPC title

  • of insulating materials · CPC title

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What does patent US9276059B2 cover?
Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at l…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10P76/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).