Semiconductor package

Patent metadata

Field	Value
Publication number	US-9275928-B2
Application number	US-201214371021-A
Country	US
Kind code	B2
Filing date	May 1, 2012
Priority date	May 1, 2012
Publication date	Mar 1, 2016
Grant date	Mar 1, 2016

Abstract

A metallic ring is located on a multilayer ceramic substrate. An optical semiconductor laser is located on the multilayer ceramic substrate, inside the metallic ring. A metallic cap with a window is joined to the metallic ring. The metallic cap covers the optical semiconductor laser. An external heat sink is joined to an external side surface of the metallic cap. These features make it possible to improve high-frequency characteristics, producibility, and heat dissipation.

First claim

The invention claimed is:

1. A semiconductor package comprising:
a multilayer ceramic substrate;
a metallic ring located on the multilayer ceramic substrate;
an internal heat sink located on the multilayer ceramic substrate and inside the metallic ring;
an optical semiconductor element located on the internal heat sink; and
a metallic cap with a window, wherein
the metallic cap is joined to the metallic ring and covers the optical semiconductor element, and
an inner end of the metallic ring is in contact with the internal heat sink.

2. The semiconductor package according to claim 1 , wherein an outer end of the metallic ring is flush with an outer end of the multilayer ceramic substrate.

3. The semiconductor package according to claim 1 , further comprising an external heat sink joined to an outer end of the metallic ring.

4. A semiconductor package comprising:
a multilayer ceramic substrate;
a metallic ring located on the multilayer ceramic substrate;
an optical semiconductor element located on the multilayer ceramic substrate and inside the metallic ring;
a metallic cap with a window, wherein the metallic cap is joined to the metallic ring and covers the optical semiconductor element; and
an external heat sink joined to an external side surface of the metallic cap.

5. The semiconductor package according to claim 4 , wherein the external heat sink has a flat joint surface for joining to an external frame.

6. The semiconductor package according to claim 5 , wherein
the external heat sink extends to a lower surface of the multilayer ceramic substrate, and
the flat joint surface is located at a lower surface side of the multilayer ceramic substrate.

7. A semiconductor package comprising:
a multilayer ceramic substrate;
a metallic ring located on the multilayer ceramic substrate;
an electrode located on the multilayer ceramic substrate and inside the metallic ring;
an optical semiconductor element located on the multilayer ceramic substrate, inside the metallic ring, and electrically connected to the electrode;
a metallic cap with a window, wherein
the metallic cap is joined to the metallic ring and covers the optical semiconductor element, and
the metallic ring is thicker than the electrode; and

an internal heat sink located on the multilayer ceramic substrate and inside the metallic ring, wherein the optical semiconductor element is located on the internal heat sink, and
an inner end of the metallic ring is in contact with the internal heat sink.

8. The semiconductor package according to claim 7 , further comprising an external heat sink joined to an outer end of the metallic ring.

9. The semiconductor package according to claim 7 , wherein an outer end of the metallic ring is flush with an outer end of the multilayer ceramic substrate.

Assignees

• Matsusue Akihiro
• Mitsubishi Electric Corp

Inventors

• Matsusue Akihiro

Classifications

• H10W72/552

  comprising metals or metalloids, e.g. silver · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W40/259 Primary

  Ceramics or glasses (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title

• H01S5/06226

  Modulation at ultra-high frequencies · CPC title