Methods of fabricating semiconductor structures

Patent metadata

Field	Value
Publication number	US-9275909-B2
Application number	US-201313964282-A
Country	US
Kind code	B2
Filing date	Aug 12, 2013
Priority date	Aug 12, 2013
Publication date	Mar 1, 2016
Grant date	Mar 1, 2016

Abstract

Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.

First claim

The invention claimed is:

1. A method of fabricating a semiconductor structure, the method comprising:
forming a stack of alternating oxide materials and control gate materials, the oxide materials comprising at least two oxide portions of different densities;
forming an opening through the stack of alternating oxide materials and control gate materials;
removing a portion of each of the control gate materials to form control gate recesses;
removing a portion of the oxide materials having a lower density at a greater rate than a portion of the oxide materials having a higher density;
forming a charge blocking material adjacent to control gate materials in the control gate recesses; and
forming a charge storage material adjacent to the charge blocking material to form charge storage structures.

2. The method of claim 1 , wherein forming a charge storage material comprises:
forming the charge storage structures, each of the charge storage structures having substantially the same height as a thickness of the control gate materials.

3. The method of claim 1 , wherein forming a stack of alternating oxide materials and control gate materials comprises:
forming a first oxide material comprising at least two oxide portions of different densities;
forming a first control gate material over the first oxide material; and
repeating the forming a first oxide material and forming a first control gate material to form a number of alternating oxide materials and control gate materials.

4. The method of claim 1 , wherein forming a stack of alternating oxide materials and control gate materials comprises:
forming the oxide material comprising at least two oxide portions of different densities by a chemical vapor deposition process at an RF power of from about 25 Watts to about 200 Watts.

5. The method of claim 1 , wherein forming a stack of alternating oxide materials and control gate materials comprises:
forming the oxide materials each comprising at least two oxide portions of different densities by an in-situ chemical vapor deposition process in one reaction chamber.

6. A method of fabricating a semiconductor structure, the method comprising:
forming an opening through a stack of alternating dielectric materials and control gate materials, each of the dielectric materials of the stack comprising at least two portions of different densities;
removing a portion of the control gate materials to form control gate recesses laterally adjacent the control gate materials;
selectively removing portions of the dielectric materials having lower density relative to portions of the dielectric materials having higher density to increase a height of the control gate recesses;
forming a charge blocking material adjacent exposed surfaces of the control gate materials; and
filling the control gate recesses with a charge storage material to form charge storage structures having substantially the same height as the control gate materials.

7. The method of claim 6 , wherein forming a charge blocking material adjacent exposed surfaces of the control gate materials comprises forming an inter-poly dielectric material in the control gate recesses.

8. The method of claim 6 , further comprising extending the opening through a control gate material of a select device and into a portion of an oxide material underlying the control gate material of the select device.

9. The method of claim 8 , further comprising forming a tunnel dielectric material on exposed surfaces of the charge storage structures.

10. The method of claim 9 , further comprising forming a liner material substantially conformally on sidewalls of the opening.

11. The method of claim 10 , further comprising extending the opening through a remaining portion of the oxide material underlying the control gate material of the select device, and at least a portion of a source.

12. The method of claim 11 , further comprising filling the opening with a channel material.

13. The method of claim 1 , wherein forming a stack of alternating oxide materials and control gate materials comprises:
forming the oxide materials comprising at least two oxide portions of different densities, one oxide portion having a density of from about six times lower to about two times higher than a density of an adjacent oxide portion in the at least two oxide portions.

14. The method of claim 1 , wherein forming a stack of alternating oxide materials and control gate materials comprises:
forming a top oxide portion, a middle oxide portion and a bottom oxide portion, wherein a density of the middle oxide portion is higher than a density of the top oxide portion and a density of the bottom oxide portion.

15. The method of claim 1 , wherein removing a portion of the oxide materials having a lower density at a greater rate than a portion of the oxide materials having a higher density, comprises:
removing the portion of the oxide materials having a lower density at a greater rate than the portion of the oxide materials having a higher density, wherein the portion of the oxide materials having a lower density is adjacent to the control gate recesses.

16. The method of claim 1 , wherein forming a charge blocking material adjacent to control gate materials in the control gate recesses comprises forming the charge blocking material comprising an oxide-nitride-oxide (ONO) material.

17. The method of claim 1 , further comprising forming a tunnel dielectric material on exposed surfaces of the charge storage structure; and filling the opening with a channel material.

18. The method of claim 17 , wherein filling the opening with a channel material comprises filling the opening with conductively doped polysilicon.

19. The method of claim 6 , wherein forming an opening through a stack of alternating dielectric materials and control gate materials, each of the dielectric materials of the stack comprising at least two portions of different densities, comprises:
forming the dielectric materials comprising at least two portions of different densities, one portion of the at least two portions having a different rate of removal when exposed to the same etch chemistry as an adjacent portion of the at least two portions.

20. The method of claim 6 , wherein forming an opening through a stack of alternating dielectric materials and control gate materials, each of the dielectric materials of the stack comprising at least two portions of different densities, comprises:
forming the dielectric materials comprising at least two portions of different densities, one portion of the at least two portions having an etch rate at least about two times greater than that of an adjacent portion in the at least two portions when exposed to the same etch chemistry.

Assignees

• Micron Technology Inc

Inventors

• Jayanti Srikant
• Simsek-Ege Fatma Arzum
• Aella Pavan Kumar Reddy

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6532

  by exposure to a plasma · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title