Semiconductor integrated circuit

Patent metadata

Field	Value
Publication number	US-9274583-B2
Application number	US-200913060085-A
Country	US
Kind code	B2
Filing date	Aug 26, 2009
Priority date	Sep 4, 2008
Publication date	Mar 1, 2016
Grant date	Mar 1, 2016

Abstract

A semiconductor integrated circuit includes a central processing unit 21 the operation of which is stopped or slowed down in a sleep mode; an edge detection unit 23 detecting an edge of an interrupt signal supplied from the outside and generating an edge detection signal; and a data holding unit 22 holding data supplied from the outside when the edge detection signal is received. The central processing unit 21 reads the data held by the data holding unit 22 after returning from the sleep mode to an active mode in response to the interrupt signal.

First claim

The invention claimed is:

1. A semiconductor integrated circuit that is connected to a protection circuit for protecting a battery and calculates a remaining battery level of the battery by detecting and totaling charge and discharge currents of the battery, the semiconductor integrated circuit comprising:
a central processing unit an operation of which is stopped or slowed down in a sleep mode;
an edge detection unit generating an edge detection signal by detecting an edge of an interrupt signal supplied from the protection circuit,
wherein the interrupt signal is to cause the central processing unit to return to an active mode where the central processing unit operates at high speed; and

a data holding unit holding status data, which is supplied from the protection circuit, in response to the edge detection signal at substantially a same timing as a timing when the edge of the interrupt signal is detected, the status data being different from the interrupt signal and indicating a status of the battery,
wherein the status data supplied from the protection circuit changes from first status data to second status data after the data holding unit holds the first status data and the edge detection signal is generated, the first status data indicating a first status of the battery, and the second status data indicating a second status of the battery different from the first status, and
wherein the central processing unit reads the first status data held by the data holding unit after returning from the sleep mode to the active mode to read data, in response to the interrupt signal, while ignoring the second status data when the central processing unit returns to the active mode to read data.

Assignees

• Abe Makio
• Mitsumi Electric Co Ltd

Inventors

• Abe Makio

Classifications

• H02J7/663

  using battery or load disconnect circuits (H02J9/002 takes precedence) · CPC title

• H01M10/48

  Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte (constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569) · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/3203 Primary

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• H02J9/005

  using a power saving mode (for copiers G03G15/5004) · CPC title