Phase lock loop with cascade tracking filters for synchronizing an electric grid

Patent metadata

Field	Value
Publication number	US-9270286-B2
Application number	US-201414319469-A
Country	US
Kind code	B2
Filing date	Jun 30, 2014
Priority date	Jun 30, 2014
Publication date	Feb 23, 2016
Grant date	Feb 23, 2016

Abstract

Present embodiments relate to a method for synchronizing an electric grid. The method includes receiving a phase voltage of the electric grid. The method further includes determining one or more disturbance frequencies in the phase voltage via a plurality of sequential tracking filters, wherein each of the plurality of tracking filters corresponds to a harmonic of the received phase voltage. The method further includes removing the disturbance frequencies components sequentially to produce a minimally distorted frequency, and performing a PLL operation on the clean frequency to determine a phase angle of the frequency.

First claim

The invention claimed is:

1. A method for synchronizing an electric power source, comprising:
receiving a phase voltage of an electric power source;
determining one or more disturbance frequencies in the phase voltage via a plurality of sequential tracking filters, wherein each of the plurality of tracking filters corresponds to a harmonic of the received phase voltage;
removing each disturbance frequency sequentially within a phase-locked loop (PLL) to produce a clean frequency; and
performing a PLL operation on the clean frequency to determine a phase angle of the frequency.

2. The method of claim 1 , comprising outputting the frequency to the electric power source, wherein the phase angle is synchronized with a phase angle of the phase voltage of the electric power source.

3. The method of claim 1 , wherein the phase voltage comprises a three-phase alternating current source.

4. The method of claim 1 , wherein the plurality of sequential tracking filters comprises one or more of a tracking filter configured to determine or track a harmonic disturbance, a tracking filter configured to remove a direct current (DC) component of the phase voltage, and a tracking filter configured to remove a voltage imbalance.

5. The method of claim 4 , wherein the harmonic disturbance comprises a second order disturbance representative of twice a fundamental frequency of the phase voltage or a sixth order disturbance representative of six times the fundamental frequency of the phase voltage.

6. The method of claim 5 , wherein the second order disturbance corresponds to an imbalance in the phase voltage.

7. The method of claim 5 , wherein the sixth order disturbance corresponds to a fifth harmonic disturbance or a seventh harmonic disturbance in the phase voltage.

8. The method of claim 1 , wherein the one or more disturbance frequencies comprises one or more of a harmonic disturbance, a voltage imbalance, and a DC component of the phase voltage.

9. The method of claim 1 , wherein performing the PLL operation comprises receiving a feedback to the phase angle of the phase voltage of the electric power source.

10. The method of claim 9 , wherein performing the PLL operation further comprises:
performing a transformation on the feedback and the phase voltage of the power source to generate a transformed value;
deriving an estimated phase voltage frequency of the power source based on the transformed value;
deriving an estimated phase angle of the estimated phase voltage frequency of the power source based on the transformed value; and
locking on the estimated phase angle.

11. A system, comprising:
one or more sequential tracking filters configured to determine a frequency of one or more disturbances in the phase voltage, wherein each tracking filter corresponds to a harmonic of the received phase voltage; and
a phase-locked loop (PLL) configured to remove each determined disturbance frequency sequentially via the one or more sequential tracking filters to generate a clean frequency, and wherein the PLL is configured to determine a phase angle of an electric power source based on the clean frequency.

12. The system of claim 11 , wherein the phase voltage comprises one or more imbalanced voltage components.

13. The system of claim 11 , wherein the PLL is configured to operate continuously.

14. The system of claim 11 , wherein the plurality of sequential tracking filters comprises one or more of a tracking filter configured to determine or track a harmonic disturbance, a tracking filter configured to remove a direct current (DC) component of the phase voltage, and a tracking filter configured to remove a voltage imbalance.

15. The system of claim 14 , wherein each of the plurality of sequential tracking filters are configured to function independently of other sequential tracking filters to determine the harmonic disturbance, remove the effect of the DC component of the phase voltage, or remove the effect of the voltage imbalance.

16. The system of claim 11 , wherein the electric power source is a three-phase electric power source, and wherein the electric power source voltage comprises three phases.

17. A phase-locked loop (PLL), comprising:
circuitry configured to receive a phase voltage of an electric power source, determine an estimated phase angle based on a clean phase voltage of the electric power source, and output a voltage based on the estimated phase angle; and
one or more sequential tracking filters configured to determine one or more harmonic disturbance frequencies in the phase voltage, wherein each sequential tracking filter is configured to sequentially remove the determined harmonic disturbance frequency component from the phase voltage to produce the clean phase voltage.

18. The PLL of claim 17 , wherein the PLL is configured to receive one or more imbalanced voltages of the electric power source.

19. The PLL of claim 17 , wherein the one or more harmonic disturbance frequencies comprises a second order disturbance representative of twice a fundamental frequency of the phase voltage or a sixth order disturbance representative of six times the fundamental frequency of the phase voltage.

20. The PLL of claim 19 , wherein each of the plurality of sequential tracking filters are configured to function independently of other sequential tracking filters to determine the one or more harmonic disturbance frequencies.

Assignees

• Rockwell Automation Tech Inc

Inventors

• Ahmed Ahmed Mohamed Sayed
• Kerkman Russel J
• Seibel Brian J

Classifications

• H03L7/085

  concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) · CPC title

• H03L7/0802 Primary

  the loop being adapted for reducing power consumption (H03L7/14 takes precedence) · CPC title

• H02J3/46

  Controlling the sharing of generated power between the generators, sources or networks · CPC title

• H02J3/01 Primary

  Arrangements for reducing harmonics or ripples · CPC title

• Y02E40/40

  Arrangements for reducing harmonics · CPC title