Electromagnetic interference (EMI) reduction in multi-level power converter

Patent metadata

Field	Value
Publication number	US-9270168-B2
Application number	US-201313836662-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Mar 15, 2013
Publication date	Feb 23, 2016
Grant date	Feb 23, 2016

Abstract

A multi-level power converter system includes a multi-level power converter configured to synthesize at least three direct current (DC) voltages into an alternating current (AC) output voltage, and includes a plurality of transistors. A controller generates pulse-width modulation (PWM) signals used to control a state of the plurality of transistors of the multi-level converter by comparing first and second carrier signals to a reference signals, wherein a period of the first and second carrier signals is randomly varied from a nominal period.

First claim

The invention claimed is:

1. A controller for providing pulse-width modulation control of a multi-level power converter that synthesizes at least three direct current (DC) voltages into an alternating current (AC) output voltage, the controller comprising:
a random value generator that generates random values;
a summer that adds the random values generated by the random value generator to a nominal value to define a period of first and second carrier signals;
a first carrier signal generator that generates the first carrier signal having the period defined by the output of the summer, wherein the period of the first carrier signal is varied from a nominal period by the addition of the random value provided by the random value generator to the nominal value;
a second carrier signal generator that generates the second carrier signal having the period defined by the output of the summer, wherein the period of the second carrier signal is varied from the nominal period by the addition of the random value provided by the random value generator to the nominal value;
a first comparator that compares the first carrier signal to a reference signal to generate first pulse-width modulation (PWM) signals used to control a state of a first set of transistors of the multi-level power converter; and
a second comparator that compares the second carrier signal to the reference signal to generate second PWM signals used to control a state of a second set of transistors of the multi-level power converter.

2. The controller of claim 1 , wherein the random value generator randomly generates positive and negative values.

3. The controller of claim 1 , wherein the period of the first and second carrier signals is modified once per half-cycle of the first and second carrier signals.

4. The controller of claim 1 , wherein the period of the first and second carrier signals is modified once per full-cycle of the first and second carrier signals.

5. The controller of claim 1 , wherein the period of the first and second carrier signals is modified once per multiple cycles of the first and second carrier signals.

6. The controller of claim 1 , wherein the first and second PWM signals each comprise two complementary PWM signals.

7. A method of reducing electromagnetic interference (EMI) of a multi-level power converter that synthesizes at least three direct current (DC) voltages into an alternating current (AC) output voltage, the method comprising:
generating random values;
periodically adjusting a nominal value with a generated random value to determine a randomized period of first and second carrier signals;
generating the first carrier signal and the second carrier signal each having the randomized period;
generating first pulse-width modulation (PWM) signals used to control a state of a first set of transistors of the multi-level power converter by comparing the first carrier signal to a reference signal;
generating second PWM signals used to control a state of a second set of transistors of the multi-level power converter by comparing the second carrier signal to a reference signal; and
providing the first and second PWM signals to the multi-level power converter.

8. The method of claim 7 , wherein the random values are positive and negative values, and adjusting the nominal value with the generated random value comprises adding the generated random value to the nominal value to determine the randomized period of the first carrier signal.

9. The method of claim 7 , wherein the period of the first and second carrier signals is modified once per half-cycle of the first and second carrier signals.

10. The method of claim 7 , wherein the period of the first and second carrier signals is modified once per full-cycle of the first and second carrier signals.

11. The method of claim 7 , wherein the period of the first and second carrier signals is modified once per multiple cycles of the first and second carrier signals.

12. The method of claim 7 , wherein the first and second PWM signals each comprise two complementary PWM signals.

Assignees

• Hamilton Sundstrand Corp

Inventors

• White Adam Michael
• Kheraluwala Mustansir
• Davidson Steven A

Classifications

• H02M7/501

  sinusoidal output voltages being obtained by the combination of several pulse-voltages having different amplitude and width · CPC title

• H02M7/487

  Neutral point clamped inverters · CPC title

• H02M7/538

  in a push-pull configuration (H02M7/5375 takes precedence {; with oscillating arrangements H02M7/53832, H02M7/53846}) · CPC title

• H02M1/44 Primary

  Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title