Resistance change memory device having threshold switching and memory switching characteristics, method of fabricating the same, and resistance change memory device including the same

Patent metadata

Field	Value
Publication number	US-9269901-B2
Application number	US-201313864548-A
Country	US
Kind code	B2
Filing date	Apr 17, 2013
Priority date	Apr 17, 2012
Publication date	Feb 23, 2016
Grant date	Feb 23, 2016

Abstract

Disclosed are a resistance change memory device, a method of fabricating the same, and a resistance change memory array including the same. The resistance change memory device includes a first electrode and a second electrode. A hybrid switching layer is interposed between the first electrode and the second electrode. The hybrid switching layer is a metal oxide layer having both threshold switching characteristics and memory switching characteristics.

First claim

What is claimed is:

1. A resistance change memory device comprising:
a first electrode;
a second electrode; and
a hybrid switching layer disposed between the first electrode and the second electrode, the hybrid switching layer being a metal oxide layer having both threshold switching characteristics and memory switching characteristics,
wherein the hybrid switching layer comprises:
a threshold switching layer disposed on the first electrode and having threshold switching characteristics; and
a memory switching layer formed by surface treatment of the threshold switching layer with oxygen and having memory switching characteristics,
wherein the memory switching layer and the threshold switching layer are formed of the same kind of metal oxide and have different oxygen content.

2. The resistance change memory device according to claim 1 , wherein the hybrid switching layer is represented by FeO x (1≦X≦2), VO x (1≦X≦2.5), TiO x (1≦X≦2), or NbO x (1≦X≦2.5).

3. The resistance change memory device according to claim 1 , wherein the memory switching layer having a higher oxygen content than the threshold switching layer.

4. The resistance change memory device according to claim 3 , wherein the threshold switching layer exhibits metal-insulator transition characteristics.

5. The resistance change memory device according to claim 3 , wherein the threshold switching layer is represented by FeO x (1≦X≦1.5), VO x (1≦X≦2), TiO x (1≦X≦1.75), or NbO x (1≦X≦2).

6. The resistance change memory device according to claim 3 , wherein the threshold switching layer is represented by NbO x (1≦X≦2).

7. The resistance change memory device according to claim 1 , wherein the second electrode contains a metal having the same or lower Gibb's free energy for generation of oxides than a metal contained in the hybrid switching layer, at least in a region thereof adjoining the hybrid switching layer, so that oxygen in the hybrid switching layer moves into the second electrode, the region is changed into a metal-rich conductive oxide region, and oxygen holes are accumulated inside the hybrid switching layer.

8. A method of fabricating a resistance change memory, comprising:
forming a first electrode;
forming a metal-rich non-stoichiometric metal oxide layer on the first electrode;
subjecting the metal oxide layer to surface treatment with oxygen to form a hybrid switching layer corresponding to a metal oxide layer having both threshold switching characteristics and memory switching characteristics; and
forming a second electrode on the hybrid switching layer,
wherein the hybrid switching layer comprises:
a threshold switching layer disposed on the first electrode and having threshold switching characteristics; and
a memory switching layer disposed on the threshold switching layer and having memory switching characteristics,
wherein the memory switching layer and the threshold switching layer are formed of the same kind of metal oxide and have different oxygen content.

9. The method of fabricating a resistance change memory device according to claim 8 , wherein the metal-rich non-stoichiometric metal oxide layer exhibits metal-insulator transition characteristics.

10. The method of fabricating a resistance change memory device according to claim 8 , wherein the metal-rich non-stoichiometric metal oxide layer is represented by FeO x (1≦X≦1.5), VO x (1≦X≦2), TiO x (1≦X≦1.75), or NbO x (1≦X≦2).

11. The method of fabricating a resistance change memory device according to claim 8 , wherein the memory switching layer having a higher oxygen content than the threshold switching layer.

12. The method of fabricating a resistance change memory device according to claim 8 , wherein oxygen in the hybrid switching layer moves into the second electrode, so that the region is changed into a conductive oxide region.

13. The method of fabricating a resistance change memory device according to claim 8 , wherein the second electrode contains a metal having the same or lower Gibb's free energy for generation of oxides than a metal contained in the hybrid switching layer, at least in a region thereof adjoining the hybrid switching layer, so that oxygen in the hybrid switching layer moves into the second electrode, the region is changed into a metal-rich conductive oxide region, and oxygen holes are accumulated inside the hybrid switching layer.

14. A resistance change memory array comprising:
a plurality of first signal lines;
a plurality of second signal lines crossing the first signal lines; and
a hybrid switching layer disposed at each of crossing points between the first signal lines and the second signal lines, the hybrid switching layer being an oxide layer having both threshold switching characteristics and memory switching characteristics,
wherein the hybrid switching layer comprises:
a threshold switching layer disposed on the first signal lines and having threshold switching characteristics; and
a memory switching layer formed by surface treatment of the threshold switching layer with oxygen and having memory switching characteristics,
wherein the memory switching layer and the threshold switching layer are formed of the same kind of metal oxide and have different oxygen content.

15. The resistance change memory array according to claim 14 , wherein the hybrid switching layer is represented by FeO x (1≦x≦2 ), VO x (1≦X≦2.5), TiO x (1≦X≦2), or NbO x (1≦X≦2.5).

16. The resistance change memory array according to claim 14 , wherein the memory switching layer having a higher oxygen content than the threshold switching layer.

17. The resistance change memory array according to claim 16 , wherein the threshold switching layer exhibits metal-insulator transition characteristics.

18. The resistance change memory array according to claim 16 , wherein the threshold switching layer is represented by FeO x (1≦X≦1.5), VO x (1≦X≦2), TiO x (1≦X≦1.75), or NbO x (1≦X≦2).

19. The resistance change memory device according to claim 16 , wherein the threshold switching layer is represented by NbO x (1≦X≦2).

20. The resistance change memory array according to claim 14 , wherein the second signal lines contains a metal having the same or lower Gibb's free energy for generation of oxides than a metal contained in the hybrid switching layer, at least in a region thereof adjoining the hybrid switching layer, so that oxygen in the hybrid switching layer moves into the second signal lines, the region is changed into a metal-rich conductive oxide region, and oxygen holes are accumulated inside the hybrid switching layer.

Assignees

• Hwang Hyunsang
• Kim Seonghyun
• Liu Xinjun
• Kwangju Inst Sci & Tech

Inventors

• Hwang Hyunsang
• Kim Seonghyun
• Liu Xinjun

Classifications

• H01L45/1233

  Electricity · mapped topic

• H01L45/08

  Electricity · mapped topic

• H01L45/145 Primary

  Electricity · mapped topic

• H01L27/2463

  Electricity · mapped topic

• H01L45/146

  Electricity · mapped topic