Populating localized fast bulk storage in a multi-node computer system

US9268684B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9268684-B2
Application numberUS-201313931870-A
CountryUS
Kind codeB2
Filing dateJun 29, 2013
Priority dateMar 29, 2013
Publication dateFeb 23, 2016
Grant dateFeb 23, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1. An HPC system having a plurality of housings, each housing including one or more computing blades that each have at least one computing processor, wherein a plurality of the computing processors in the HPC system are configured to cooperate to perform a computation defined by a user of the HPC system, and wherein at least one housing comprises: a computing region having a first computing processor that is used in performing the computation; and a data stor…

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What does patent US9268684B2 cover?
A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the proces…
Who is the assignee on this patent?
Silicon Graphics Int Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/263. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).