Technologies for configuring transmitter equalization in a communication system

Patent metadata

Field	Value
Publication number	US-9264267-B2
Application number	US-201414583663-A
Country	US
Kind code	B2
Filing date	Dec 27, 2014
Priority date	Mar 10, 2014
Publication date	Feb 16, 2016
Grant date	Feb 16, 2016

Abstract

Technologies for transmitter equalization in a communication system include reading local transmitter equalization settings from a transmitter equalization register of a first communication device and writing the local transmitter equalization settings to a transmitter equalization register of a second communication device communicatively coupled with the first communication device via a chip-to-chip communication link. Additionally, requested transmitter equalization settings may be read from the transmitter equalization register of the second communication device and written to the transmitter equalization register of the first communication device. The reading and writing process may be repeated for the opposite communication direction and for other communication lane interfaces of the first and second communication devices.

First claim

The invention claimed is:

1. A station management entity comprising:
a processor; and
a memory having stored therein a plurality of instructions that, when executed by the processor, cause the processor to:
read, over a management data input/output (MDIO) bus established between the station management entity and a plurality of communication devices, a pre-cursor local value from a pre-cursor local setting register bank of a first transmitter equalization register of a first communication lane interface of a first communication device;
read, over the MDIO bus, a post-cursor local value from a post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device;
write, over the MDIO bus, the pre-cursor local value to a pre-cursor remote setting register bank of a first transmitter equalization register of a first communication lane interface of a second communication device;
write, over the MDIO bus, the post-cursor local value to a post-cursor remote setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device;
read, over the MDIO bus, a pre-cursor requested value from a pre-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device;
read, and over the MDIO bus, a post-cursor requested value from a post-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device;
read, over the MDIO bus, a request flag from the first transmitter equalization register of the first communication lane interface of the second communication device;
write, over the MDIO bus, the pre-cursor requested value to the pre-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true; and
write, over the MDIO bus, the post-cursor requested value to the post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true.

2. The station management entity of claim 1 , wherein:
to read the pre-cursor local value comprises reading bits 0 and 1 of the first transmitter equalization register of the first communication lane interface of the first communication device,
to read the post-cursor local value comprises reading bits 2 , 3 , and 4 of the first transmitter equalization register of the first communication lane interface of the first communication device,
to write the pre-cursor local value comprises writing to bits 5 and 6 of the first transmitter equalization register of the first communication lane interface of the second communication device,
to write the post-cursor local value comprises writing to bits 7 , 8 , and 9 of the first transmitter equalization register of the first communication lane interface of the second communication device,
to read the request flag from the transmitter equalization register comprises reading bit 15 of the first transmitter equalization register of the first communication lane interface of the second communication device,
to read the pre-cursor requested value comprises reading bits 10 and 11 of the first transmitter equalization register of the first communication lane interface of the second communication device,
to read the post-cursor requested value comprises reading bits 12 , 13 , and 14 of the first equalization register of the first communication lane interface of the second communication device,
to write the pre-cursor requested value comprises writing to bits 0 and 1 of the first transmitter equalization register of the first communication lane interface of the first communication device, and
to write the post-cursor requested value comprises writing to bits 2 , 3 , and 4 of the first transmitter equalization register of the first communication lane interface of the first communication device.

3. The station management entity of claim 1 , wherein the plurality of instructions further cause the processor to, in response to the request flag being false,
read, over the MDIO bus, a pre-cursor local value from a pre-cursor local setting register bank of a second transmitter equalization register of the first communication lane interface of the second communication device;
read, over the MDIO bus, a post-cursor local value from a post-cursor local setting register bank of the second transmitter equalization register of the first communication lane interface of the second communication device;
write, over the MDIO bus, the pre-cursor local value read from the second transmitter equalization register of the first communication lane interface of the second communication device to a pre-cursor remote setting register bank of a second transmitter equalization register of the first communication lane interface of the first communication device;
write, over the MDIO bus, the post-cursor local value read from the second transmitter equalization register of the first communication lane interface of the second communication device to a post-cursor remote setting register bank of the second transmitter equalization register of the first communication lane interface of the first communication device;
read, over the MDIO bus, a pre-cursor requested value from a pre-cursor request setting register bank of the second transmitter equalization register of the first communication lane interface of the first communication device;
read, over the MDIO bus, a post-cursor requested value from a post-cursor request setting register bank of the second transmitter equalization register of the first communication lane interface of the first communication device;
read, over the MDIO bus, a request flag from the second transmitter equalization register of the first communication lane interface of the first communication device;
write, over the MDIO bus, the pre-cursor requested value read from the second transmitter equalization register of the first communication lane interface of the first communication device to the pre-cursor local setting register bank of the second transmitter equalization register of the first communication lane interface of the second communication device in response to the request flag read from the second transmitter equalization register of the first communication lane interface of the first communication device being true; and
write, over the MDIO bus, the post-cursor requested value read from the second transmitter equalization register of the first communication lane interface of the first communication device to a post-cursor local setting register bank of the second transmitter equalization register of the first communication lane interface of the second communication device in response to the request flag read from the second transmitter equalization register of the first communication lane interface of the first communication device being true.

4. The station management entity of claim 3 , wherein:
to read the pre-cursor local value from the second transmitter equalization register of the first communication lane interface of the second communication device comprises reading bits 0 and 1 of the second transmitter equalization register of the first communication lane interface of the second communication device,
to read the post-cursor local value from the second transmitter equalization register of the first communication lane interface of the second communication device comprises reading bits 2 , 3 , and 4 o

Assignees

• Ran Adee O
• Intel Corp

Inventors

• Ran Adee O

Classifications

• C07C63/26

  1,4 - Benzenedicarboxylic acid · CPC title

• B01D3/009

  in combination with chemical reactions · CPC title

• C07C51/265

  having alkyl side chains which are oxidised to carboxyl groups · CPC title

• C08G63/183

  Terephthalic acids · CPC title

• H04L25/03885 Primary

  adaptive · CPC title