All-tungsten scheme for source/drain contact, source/drain via, and gate via
US-2024395618-A1 · Nov 28, 2024 · US
Contact plug and method for manufacturing the same
US9263281B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9263281-B2 |
| Application number | US-201314015538-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2013 |
| Priority date | Aug 30, 2013 |
| Publication date | Feb 16, 2016 |
| Grant date | Feb 16, 2016 |
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Abstract
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A method for manufacturing a contact plug is provided. The method includes providing a silicon substrate having at least one opening. A titanium layer is conformably formed in the opening. A first barrier layer is conformably formed on the titanium layer in the opening. A rapid thermal process is performed on the titanium layer and the first barrier layer. After performing the rapid thermal process, a second barrier layer is conformably formed on the first barrier layer in the opening.
First claim
Opening claim text (preview).
What is claimed is: 1. A contact plug, comprising: a silicon substrate having at least one opening and having a doped region formed therein and at a bottom portion of the opening; a titanium layer conformably formed in the opening, such that the titanium layer directly contacts the silicon substrate through the opening; a first barrier layer conformably formed on the titanium layer in the opening; and a second barrier layer conformably formed on a top surface of the first ba…
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Electricity · mapped topic
Electricity · mapped topic
- H10D64/0112Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9263281B2 cover?
- A method for manufacturing a contact plug is provided. The method includes providing a silicon substrate having at least one opening. A titanium layer is conformably formed in the opening. A first barrier layer is conformably formed on the titanium layer in the opening. A rapid thermal process is performed on the titanium layer and the first barrier layer. After performing the rapid thermal pro…
- Who is the assignee on this patent?
- Vanguard Int Semiconduct Corp
- What technology area does this patent fall under?
- Primary CPC classification H10D64/0112. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).