Data storing system and operating method thereof

Patent metadata

Field	Value
Publication number	US-9263155-B2
Application number	US-201414188268-A
Country	US
Kind code	B2
Filing date	Feb 24, 2014
Priority date	Sep 10, 2013
Publication date	Feb 16, 2016
Grant date	Feb 16, 2016

Abstract

A data storing system performs a test operation on a memory block on which a read operation is determined to be failed, and determines whether the memory block is or is not a bad block based on a result of the test operation. The data storing system may improve reliability and yield of a device.

First claim

What is claimed is:

1. A method of operating a data storing system, comprising:
storing a read fail block address and a bad block address in a bad block management module;
performing a test operation on a read fail block corresponding to the read fail block address stored in the bad block management module; and
excluding the read fail block address from the bad block management module when the test operation is determined to be passed, and determining the read fail block as the bad block when the test operation is determined to be failed.

2. The method of claim 1 , wherein the storing of the read fail block address comprising:
performing a read operation on memory cells of a memory block; and
storing an address corresponding to the memory block as the read fail block address in the bad block management module when the read operation is determined to be failed.

3. The method of claim 1 , wherein the test operation is performed during an idle period of the data storing system.

4. The method of claim 1 , wherein the test operation is performed when a free address storage space within the bad block management module becomes equal to or lower than a threshold.

5. The method of claim 1 , wherein the performing of the test operation includes:
performing an erase operation on the read fail block;
performing a program operation of programming data pith specific pattern on memory cells of the read fail block; and
performing a read operation of reading the data from the memory cells,
wherein, when the read operation is determined to be passed, the read fail block address is excluded from the bad block management module, and when the read operation is determined to be failed, the read fail block is determined as the bad block.

6. The method of claim 5 , wherein when the erase operation is determined to be passed, the program operation is performed, and when the erase operation is determined to be failed, the program operation is not performed, and the read fail block is determined as a bad block.

7. The method of claim 5 , wherein when the program operation is determined to be passed, the read operation is performed, and when the program operation is determined to be failed, the read operation is not performed, and the read fail block is determined as a bad block.

8. The method of claim 5 , wherein, when the number of error bits within the read data is larger than the number of error correctable bits, the read operation is determined to be failed.

9. The method of claim 1 , further comprising:
performing a program operation or an erase operation on memory cells of a memory block; and
storing an address corresponding to the memory block as the bad block address in the bad block management module when the program operation or the erase operation is determined to be failed.

10. A data storing system, comprising:
a controller including a bad block management module suitable for storing a read fail block address and a bad block address; and
a semiconductor device suitable for performing a test operation on a read fail block among memory blocks based on a command and an address input from the controller,
wherein, when the test operation is determined to be passed, the controller excludes the corresponding read fail block address from the bad block management module, and when the test operation is determined to be failed, the controller changes the corresponding read fail block address to a bad block address and stores the changed bad block address in the bad block management module.

11. The data storing system of claim 10 , wherein the semiconductor device performs a read operation on memory cells of a memory block, and
when the read operation is determined to be failed, the controller stores an address corresponding to the memory block as the read fail block address in the bad block management module.

12. The data storing system of claim 11 , wherein the semiconductor device stores the read fail block address and the bad block address, and
the controller stores the read fail block address and the bad block address in the bad block management module when power is on.

13. The data storing system of claim 10 , wherein the test operation is performed during an idle period of the data storing system.

14. The data storing system of claim 10 , wherein the test operation is performed when a free address storage space within the bad block management module becomes equal to or lower than a threshold.

15. The data storing system of claim 10 , wherein the semiconductor device performs an erase operation on the read fail block in response to a first command during the test operation, and
when the erase operation during the test operation is determined to be failed, the controller changes the corresponding read fail block address to the bad block address and stores the changed bad block address in the bad block management module.

16. The data storing system of claim 15 , wherein when the erase operation is determined to be passed, the semiconductor device performs a program operation of programming data with a specific pattern in memory cells of the erased read fail block in response to a second command during the test operation, and
when the program operation is determined to be failed, the controller changes the corresponding read fail block address to the bad block address and stores the changed bad block address in the bad block management module.

17. The data storing system of claim 16 , wherein, when the program operation is determined to be passed, the semiconductor device performs a read operation of reading the data from the memory cells of the programmed read fail block in response to a third command during the test operation,
when the read operation is determined to be passed, the controller excludes the corresponding read fail block address from the bad block management module, and when the read operation is determined to be failed, the controller changes the corresponding read fail block address to the bad block address and stores the changed bad block address in the bad block management module.

18. The data storing system of claim 10 , wherein the bad block management module includes:
an address storing unit suitable for storing the read fail block address and the bad block address; and
an error correction unit suitable for detecting and correcting an error of data read from the semiconductor device, and generate a pass/fail signal of the read operation depending on the error detection.

19. A data storing system, comprising:
a controller suitable for storing a bad block list; and
a semiconductor device suitable for performing a test operation on a memory block corresponding to a block address listed on the bad block list as a provisional read fail block,
wherein the controller updates the bad block list on the provisional read fail block depending on the result of the test operation.

20. The data storing system of claim 19 , wherein, depending on the result of the test operation, the provisional read fail block is excluded from the bad block list or is arranged as a bad block.

21. The data storing system of claim 19 , wherein the test operation includes an erase operation, a program operation, and a read operation sequentially performed on the memory block.

22. The data storing system of claim 19 , wherein the test operation is performed during an idle period of the data storing system.

Assignees

• Sk Hynix Inc

Inventors

• Kim Eui Jin

Classifications

• G11C2029/4402

  Internal storage of test result, quality data, chip identification, repair information · CPC title

• G11C29/44 Primary

  Indication or identification of errors, e.g. for repair · CPC title

• G06F11/1048

  using arrangements adapted for a specific error detection or correction feature · CPC title

• G11C29/42

  using error correcting codes [ECC] or parity check · CPC title

• G11C29/00 Primary

  Checking stores for correct operation {; Subsequent repair}; Testing stores during standby or offline operation · CPC title