Functional screening of static random access memories using an array bias voltage
US-9208832-B2 · Dec 8, 2015 · US
US9263147B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9263147-B2 |
| Application number | US-201414490170-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 18, 2014 |
| Priority date | May 8, 2014 |
| Publication date | Feb 16, 2016 |
| Grant date | Feb 16, 2016 |
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An apparatus for concurrent test of a set of flash memory banks apparatus includes a memory data path (MDP) module coupled to a test controller. The MDP module includes a test control module configured to generate a concurrent control signal that configures the set of flash memory banks to be tested simultaneously; and a set of comparators, that generates a first comparator output in response to the concurrent control signal and an input from the set of flash memory banks. A reduction logic is configured to generate a reduction logic output that combines a status of the comparator outputs to be compressed. A control logic is configured for selective programming across different flash bits of the set of flash memory banks. A fail flag is configured to generate one of an output value ‘0’ if there is a mismatch in data read from the set of flash memory banks in any access, and an output value 1 if there is no mismatch in data read in any access.
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What is claimed is: 1. An apparatus for concurrent test of a set of flash memory banks, comprising: a memory data path module coupled to a test controller, the test controller being configured to generate a test stimulus and to check a response from the set of flash memory banks, the memory data path module comprising: a test control module configured to generate a concurrent control signal that configures the set of flash memory banks to be tested simultaneously; a set of com…
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