Method and apparatus for bit-line sensing gates on an sram cell
US-2015364183-A1 · Dec 17, 2015 · US
US9262575B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9262575-B2 |
| Application number | US-201414176740-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 10, 2014 |
| Priority date | Feb 10, 2014 |
| Publication date | Feb 16, 2016 |
| Grant date | Feb 16, 2016 |
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A method for predicting a condition in a circuit under design includes obtaining a set comprising first static noise margin curve for the circuit and a second static noise margin curve for the circuit, wherein the second static noise margin curve is complementary to the first static noise margin curve, matching the set to a two-dimensional model of a cell, and predicting the condition in accordance with hardware characterization data corresponding to the cell.
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What is claimed is: 1. A computer-implemented method for predicting a condition in a circuit under design, the method comprising: obtaining a first set comprising a first static noise margin curve for the circuit and a second static noise margin curve for the circuit, wherein each of the first static noise margin curve and the second static noise margin curve plots a voltage of an input node of the circuit against a corresponding voltage of an output node of the circuit, wherein t…
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