Sensor system using multiple modes for analog to digital conversion

US9258005B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9258005-B2
Application numberUS-201414319177-A
CountryUS
Kind codeB2
Filing dateJun 30, 2014
Priority dateJun 30, 2014
Publication dateFeb 9, 2016
Grant dateFeb 9, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A device for converting analog to digital is disclosed. The device includes a dual mode converter and a control unit. The dual mode converter has a coarse mode and a fine mode. The dual mode converter is configured to receive an input signal and convert the input signal to a digital output having a selected resolution. The control unit is coupled to the dual mode converter and is configured to operate the converter in the coarse mode until a coarse approximation is obtained and to operate the converter in the fine mode until a fine approximation is obtained having the selected resolution. The fine mode includes multi-bit incremental tracking.

First claim

Opening claim text (preview).

What is claimed is: 1. A device for converting analog to digital, the device comprising: a dual mode converter having a coarse mode and a fine mode, the dual mode converter configured to receive an input signal and convert the input signal to a digital output having a selected resolution; and a control unit coupled to the dual mode converter and configured to operate the converter in the coarse mode until a coarse approximation is obtained and to operate the converter in the fine mode until a fine approximation is obtained having the selected resolution, wherein the fine mode includes multi-bit incremental tracking. 2. The device of claim 1 , further comprising a sensor element configured to generate the input signal. 3. The device of claim 2 , wherein the sensor element is one of a group comprising a magnetic element, a temperature element, a mechanical element, a stress element, and a voltage measurement element. 4. The device of claim 1 , wherein the device is configured for a selected duty cycle, including a number of cycles for the coarse mode and a number of cycles for the fine mode. 5. The device of claim 1 , wherein the coarse mode iteratively operates for a selected number of cycles until a selected least significant bit is reached. 6. The device of claim 1 , wherein the fine approximation is the digital output and the selected resolution is at 8 bits or greater. 7. The device of claim 1 , wherein the dual mode converter iteratively generates an updated coarse approximation until the coarse approximation is obtained and iteratively generates an updated fine approximation utilizing the coarse approximation until the fine approximation is obtained. 8. The device of claim 1 , wherein the dual mode converter includes: a stage configured to receive the input signal and generate an integration output in the fine mode and a comparison output in the coarse mode according to updated reference values; and a digital component coupled to the stage and configured to provide the updated reference values to the stage at least partially according to the integration output in the fine mode and the comparison output in the coarse mode. 9. The device of claim 8 , wherein the dual mode converter further includes a current steering DAC configured to steer the updated reference values to the stage. 10. The device of claim 1 , wherein the dual mode converter includes a continuous time integrator for the fine mode. 11. The device of claim 1 , wherein the dual mode converter includes an up/down counter. 12. The device of claim 1 , wherein the dual mode converter is configured to adapt to a slope of the input signal when using the multi-bit incremental tracking. 13. The device of claim 1 , wherein the multi-bit incremental tracking employs multiple bits or levels as feedback to update successive approximations in the fine mode. 14. A dual mode converter comprising: a first stage configured to successively generate a comparison output according to coarse reference values in a coarse mode and to successively generate an integration output according to fine reference values in a fine mode; a second stage coupled to the first stage, wherein the comparison output is provided as an updated coarse approximation and the integration output is provided as an updated fine approximation; and a digital component configured to update the coarse reference values using successive approximation and to update the fine reference values using multi-bit incremental tracking. 15. The converter of claim 13 , wherein the second stage includes a latch clocked by a synchronous clock. 16. The converter of claim 13 , wherein the digital component includes successive approximation logic configured to update the coarse reference values, multi-bit incremental logic configured to update the fine reference values and a digital chopper. 17. The converter of claim 13 , further comprising a current steering component coupled to the digital component and configured to generate and provide steering values including the coarse reference values and the fine reference values to the first stage. 18. The converter of claim 13 , wherein the first stage includes integrating, switchable capacitors configured to generate the integration output. 19. A method of converting a sensor value to a digital output, the method comprising: receiving an input signal; obtaining a coarse approximation of the input signal; and obtaining a multi-bit incremental tracking approximation of the input signal using multi-bit tracking and the coarse approximation. 20. The method of claim 19 , wherein obtaining the multi-bit incremental tracking approximation includes successively generating an integration output according to fine reference values by a stage and successively updating the fine reference values by a digital component. 21. The method of claim 19 , wherein obtaining a coarse approximation includes operating a stage as a comparator in a coarse mode and obtaining a multi-bit incremental tracking approximation includes operating the stage as an integrator.

Assignees

Inventors

Classifications

  • Analogue/digital/analogue conversion · CPC title

  • H03M1/12Primary

    Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

  • H03M1/144Primary

    the steps being performed sequentially in a single stage, i.e. recirculation type (H03M1/141, H03M1/143, H03M1/16 take precedence) · CPC title

  • with digital/analogue converter for supplying reference values to converter · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9258005B2 cover?
A device for converting analog to digital is disclosed. The device includes a dual mode converter and a control unit. The dual mode converter has a coarse mode and a fine mode. The dual mode converter is configured to receive an input signal and convert the input signal to a digital output having a selected resolution. The control unit is coupled to the dual mode converter and is configured to …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H03M1/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 09 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).