Circuit arrangement for protecting electronic devices against incorrect logic voltages

Patent metadata

Field	Value
Publication number	US-9257897-B2
Application number	US-60460509-A
Country	US
Kind code	B2
Filing date	Oct 23, 2009
Priority date	Oct 29, 2008
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

The invention is based on the problem of devising a circuit arrangement ( 10 ) for protecting electronic devices from incorrect logic voltages, wherein this circuit arrangement delivers increased protection against overvoltages, so that this circuit arrangement could also be used in multi-channel fail-safe systems that satisfy, for example, Performance Level “e” according to DIN EN ISO 13849. The circuit arrangement ( 10 ) has an input terminal ( 80 ) for connecting a power supply device and at least one voltage converter ( 90 ) that delivers, on the output side, an adjustable logic voltage. A controllable switching element ( 70 ) is connected between the one or more voltage converters ( 90, 95 ) and the input terminal ( 80 ). Furthermore, a first monitoring device ( 20 ) is provided for monitoring the logic voltage. The first monitoring device ( 20 ) is constructed so that it triggers the opening of the switching element ( 70 ) when the logic voltage reaches or exceeds a predetermined threshold.

First claim

What is claimed is:

1. A fail-safe system for multi-channel monitoring of a safety-related device, the fail-safe system comprising:
at least first and second logic devices ( 101 , 102 ) each of which being associated to a separate channel and being to be protected against faulty logic voltages;
an input terminal ( 80 ) for connecting a power-supply device for supplying an input voltage;
a controllable switching element ( 70 ) connected between the input of a first DC-DC converter ( 90 ) and the input terminal ( 80 ) and between the input of at least a second DC-DC converter ( 95 ) and the input terminal ( 80 ) for passing or blocking the input voltage, wherein:
the first DC-DC converter ( 90 ) includes an integrated voltage monitoring device that monitors the output voltage from the first DC-DC converter ( 90 ),
the first DC-DC converter ( 90 ) is configured to supply a first logic voltage as an output voltage to the first logic device ( 101 ),
the at least one second DC-DC converter ( 95 ) includes an integrated voltage monitoring device that monitors the output voltage from the second DC-DC converter ( 95 ), and
the at least one second DC-DC converter ( 95 ) is configured to supply a second logic voltage as an output voltage to the second logic device ( 102 ); and

a first monitoring device ( 20 ) for redundantly monitoring the first and second logic voltages outputted by the first and second DC voltage converters ( 90 , 95 ), the first monitoring device ( 20 ) comprising a comparator ( 30 ) which is supplied with the first and second logic voltages and a reference voltage, so that the first monitoring device ( 20 ) drives a holding means ( 60 ) for opening and reliably holding the switching element ( 70 ) in the open state, if at least one of the first and second logic voltages monitored by the first monitoring device reaches or exceeds the reference voltage.

2. The fail-safe system according to claim 1 , wherein a second monitoring device ( 40 ) is provided in parallel to the first monitoring device ( 20 ) to cause the switching element ( 70 ) to be opened in response to a predefined event.

3. The fail-safe system according to claim 2 , wherein the second monitoring device ( 40 ) monitors the voltage at the power supply terminal, the second logic voltage, the operability of the first monitoring device ( 20 ), and/or the operability of the switching element ( 70 ).

4. The fail-safe system according to claim 3 , wherein the first and second monitoring devices ( 20 ; 40 ) are connected to the holding means ( 60 ) via an OR gate ( 50 ) to cause the holding means ( 60 ) to open the switching element ( 70 ) and to hold it in the open state in case of an event.

5. The fail-safe system according to claim 1 , wherein the holding means ( 60 ) is a flip-flop.

Assignees

• Saeck Klaus-Peter
• Warneke Thomas
• Oster Viktor
• Phoenix Contact Gmbh & Co

Inventors

• Saeck Klaus-Peter
• Warneke Thomas
• Oster Viktor

Classifications

• H02H7/10

  for converters; for rectifiers {(forming part of the control circuit of the converter, see the relevant group in H02M)} · CPC title

• H02M1/32 Primary

  Means for protecting converters other than automatic disconnection · CPC title

• H02M3/02

  without intermediate conversion into AC · CPC title