Thin film transistor with an oxide semiconductor layer

Patent metadata

Field	Value
Publication number	US-9257594-B2
Application number	US-55311909-A
Country	US
Kind code	B2
Filing date	Sep 3, 2009
Priority date	Sep 12, 2008
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region.

First claim

The invention claimed is:

1. A semiconductor device comprising a thin film transistor, the thin film transistor comprising:
a gate electrode layer;
a gate insulating layer over the gate electrode layer;
a first source region and a first drain region over the gate insulating layer;
a source electrode layer over the first source region;
a drain electrode layer over the first drain region;
a second source region over the source electrode layer;
a second drain region over the drain electrode layer; and
an oxide semiconductor layer over the gate insulating layer, the first source region, the first drain region, the source electrode layer, the drain electrode layer, the second source region, and the second drain region,
wherein the oxide semiconductor layer has a higher oxygen concentration than oxygen concentrations of the first source region, the first drain region, the second source region, and the second drain region,
wherein the oxide semiconductor layer is in contact with the gate insulating layer, the first source region, the first drain region, the second source region, and the second drain region, and
wherein each of the oxide semiconductor layer, the first source region, the first drain region, the second source region, and the second drain region comprises at least indium, gallium, and zinc.

2. The semiconductor device according to claim 1 , wherein the semiconductor device is incorporated into one selected from the group consisting of a television set, a digital photo frame, a game machine, and a mobile phone.

3. The semiconductor device according to claim 1 , wherein the gate insulating layer comprises a material selected from the group consisting of silicon oxynitride, silicon nitride, aluminum oxide and tantalum oxide.

4. The semiconductor device according to claim 1 , wherein the gate insulating layer has a thickness of 50 to 250 nm.

5. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer has a thickness of 5 to 200 nm.

6. The semiconductor device according to claim 1 ,
wherein the first source region, the first drain region, the second source region and the second drain region contain oxygen.

7. The semiconductor device according to claim 1 ,
wherein the first source region and the first drain region are separated, and
wherein the second source region and the second drain region are separated.

8. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor layer covers a side face of the first source region, a side face of the second source region, a side face of the first drain region, and a side face of the second drain region.

Assignees

• Yamazaki Shunpei
• Akimoto Kengo
• Komori Shigeki
• Uochi Hideki
• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Akimoto Kengo
• Komori Shigeki
• Uochi Hideki

Classifications

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D30/031

  of thin-film transistors [TFT] · CPC title

• H10D64/62

  Electrodes ohmically coupled to a semiconductor · CPC title

• H10D62/10

  Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title