Method of semiconductor device including step of cutting substrate at opening of insulating layer

Patent metadata

Field	Value
Publication number	US-9257560-B2
Application number	US-201414246407-A
Country	US
Kind code	B2
Filing date	Apr 7, 2014
Priority date	Apr 10, 2013
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

Provided is a flexible device with fewer defects caused by a crack or a flexible device having high productivity. A semiconductor device including: a display portion over a flexible substrate, including a transistor and a display element; a semiconductor layer surrounding the display portion; and an insulating layer over the transistor and the semiconductor layer. When seen in a direction perpendicular to a surface of the flexible substrate, an end portion of the substrate is substantially aligned with an end portion of the semiconductor layer, and an end portion of the insulating layer is positioned over the semiconductor layer.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising the steps of:
forming a peeling layer over a support substrate;
forming a layer over the peeling layer;
forming, over the layer, a semiconductor element and a semiconductor layer surrounding the semiconductor element;
forming, over the semiconductor element and the semiconductor layer, an insulating layer with an opening overlapping the semiconductor layer;
separating the peeling layer and the support substrate from the layer after forming the insulating layer with the opening;
bonding a flexible substrate to a separated surface of the layer after separating the peeling layer and the support substrate from the layer; and
cutting the flexible substrate, the layer, and the semiconductor layer in a position overlapping with the opening after bonding the flexible substrate to the separated surface of the layer.

2. The method of manufacturing the semiconductor device according to claim 1 , wherein the semiconductor element comprises a transistor.

3. The method of manufacturing the semiconductor device according to claim 2 , wherein the semiconductor layer and a channel of the transistor are formed in the same step.

4. The method of manufacturing the semiconductor device according to claim 1 , wherein each of the semiconductor layer and the opening has a shape of a closed curve.

5. The method of manufacturing the semiconductor device according to claim 1 , further comprising a step of forming a display element over the insulating layer with the opening.

6. A method of manufacturing a semiconductor device, comprising the steps of:
forming a peeling layer over a support substrate;
forming a layer over the peeling layer;
forming, over the layer, a semiconductor element and a semiconductor layer surrounding the semiconductor element;
forming, over the semiconductor element and the semiconductor layer, an insulating layer with an opening overlapping the semiconductor layer;
forming, over the insulating layer with the opening, a conductive layer surrounding the semiconductor element;
separating the peeling layer and the support substrate from the layer after forming the conductive layer and the insulating layer with the opening;
bonding a flexible substrate to a separated surface of the layer after separating the peeling layer and the support substrate from the layer; and
cutting the flexible substrate, the layer, and the semiconductor layer in a position overlapping with the opening after bonding the flexible substrate to the separated surface of the layer,
wherein the conductive layer is between the semiconductor element and the opening.

7. The method of manufacturing the semiconductor device according to claim 6 , wherein the conductive layer has a shape of a closed curve.

8. The method of manufacturing the semiconductor device according to claim 6 , wherein the semiconductor element comprises a transistor.

9. The method of manufacturing the semiconductor device according to claim 8 , wherein the semiconductor layer and a channel of the transistor are formed in the same step.

10. The method of manufacturing the semiconductor device according to claim 6 , wherein each of the semiconductor layer and the opening has a shape of a closed curve.

11. The method of manufacturing the semiconductor device according to claim 6 , further comprising a step of forming a display element over the insulating layer with the opening.

Assignees

• Semiconductor Energy Lab

Inventors

• Adachi Hiroki
• Kumakura Kayo

Classifications

• H10D86/021

  of multiple TFTs · CPC title

• H10D86/421

  having a particular composition, shape or crystalline structure of the active layer · CPC title

• H10D86/411 Primary

  characterised by materials, geometry or structure of the substrates · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title