Semiconductor field effect power switching device

Patent metadata

Field	Value
Publication number	US-9257549-B2
Application number	US-201313870617-A
Country	US
Kind code	B2
Filing date	Apr 25, 2013
Priority date	Sep 30, 2008
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

A semiconductor device having a semiconductor body, a source metallization arranged on a first surface of the semiconductor body and a trench including a first trench portion and a second trench portion and extending from the first surface into the semiconductor body is provided. The semiconductor body further includes a pn-junction formed between a first semiconductor region and a second semiconductor region. The first trench portion includes an insulated gate electrode which is connected to the source metallization, and the second trench portion includes a conductive plug which is connected to the source metallization and to the second semiconductor region.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor body comprising a first surface, a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region and the second semiconductor region forming a pn-junction;
a source metallization arranged on the first surface; and
a trench extending from the first surface into the semiconductor body and comprising, in a horizontal plane substantially parallel to the first surface, a first trench portion and a second trench portion,
the first trench portion comprising a sidewall adjacent to the second semiconductor region, an insulating layer arranged on the side wall, the insulating layer adjoining the first semiconductor region and the second semiconductor region, and a gate electrode connected to the source metallization; the second trench portion comprising a conductive plug which is connected to the source metallization and to the second semiconductor region.

2. The semiconductor device of claim 1 , wherein the first trench portion and the second trench portion form a simply connected trench.

3. The semiconductor device of claim 1 , wherein the semiconductor device comprises a plurality of first trench portions and second trench portions which are, in a horizontal direction, arranged in a regular pattern.

4. The semiconductor device of claim 1 , wherein the first trench portion comprises a first vertical depth; and wherein the second trench portion comprises a second vertical depth which is lower than the first vertical depth.

5. The semiconductor device of claim 1 , wherein the first semiconductor region forms a source region which is connected to the source metallization and extends to the first surface; wherein the second semiconductor region forms a body region; wherein the semiconductor body further comprises a drift region of the first conductivity type adjacent to the body region; and wherein the first trench portion and the second trench portion extend through the source region and at least partially into the body region.

6. The semiconductor device of claim 5 , wherein the semiconductor body further comprises a body contact region of the second conductivity type which provides an electrical connection between the body region and the conductive plug of the second trench portion; wherein the body region comprises a first doping concentration; and wherein the body contact region comprises a second doping concentration which is higher than the first doping concentration.

7. The semiconductor device of claim 5 , wherein the semiconductor device further comprises at least one additional field effect structure which is selected from a group consisting of a lateral MOSFET, a UMOSFET, a DMOSFET, a Superjunction-MOSFET or an reverse conducting IGBT.

8. The semiconductor device of claim 5 , further comprising an additional field effect structure which comprises an additional gate electrode and a first capacitance formed between the additional gate electrode and the body region and comprising a first capacitance per unit area; and wherein the gate electrode, the insulating layer and the body region form a second capacitance comprising a second capacitance per unit area which is larger than the first capacitance per unit area.

9. The semiconductor device of claim 1 , wherein the first trench portion extends from the first surface into the semiconductor body.

10. A semiconductor device comprising:
a source metallization;
a field-effect structure comprising a source region of a first conductivity type connected to the source metallization, a body region of a second conductivity type adjacent to the source region, a drift region of the first conductivity type adjacent to the body region and a first insulated gate electrode; and
a trench comprising a first trench portion and a second trench portion, the first trench portion comprising a second insulated gate electrode connected to the source metallization; the second trench portion comprising a conductive plug electrically connecting the source metallization with the body region, wherein the source region adjoins the first trench portion.

11. The semiconductor device of claim 10 , further comprising a body contact region of the second conductivity type which adjoins the body region and a lower part of the second trench portion; wherein the body region has a first doping concentration; and wherein the body contact region has a second doping concentration which is higher than the first doping concentration.

12. The semiconductor device of claim 11 , wherein the body contact regions is embedded within the body region.

13. The semiconductor device of claim 10 , wherein the body region and the drift region form a body diode of the field-effect structure; and wherein the second insulated gate electrode forms the gate electrode of a MOS-gated diode connected in parallel to at least one of the body diode and the field-effect structure.

14. A power semiconductor device comprising:
a source metallization;
a field-effect structure comprising a source region of a first conductivity type connected to the source metallization, a body region of a second conductivity type adjacent to the source region, a drift region of the first conductivity type adjacent to the body region and a first trench comprising an insulated gate electrode;
a second trench comprising a first trench portion and a second trench portion, the first trench portion comprising an insulating layer adjoining at least the body region, and a second gate electrode connected to the source metallization; the second trench portion comprising a conductive plug electrically connecting the source metallization with the body region, and
a fourth semiconductor region adjoining the drift region, the body region and the insulating layer; wherein the fourth semiconductor region is selected from a group consisting of a semiconductor region of the first conductivity type and a weakly doped semiconductor region of the second conductivity type.

15. The power semiconductor device of claim 14 , wherein the body region comprises a first doping concentration; and wherein the power semiconductor device further comprises a third conductive region of the second conductivity type which adjoins the body region and the conductive plug, the third conductive region comprising a second doping concentration which is higher than the first doping concentration.

16. The power semiconductor device of claim 14 , wherein the conductive plug and the second gate electrode are formed by a common conductive structure.

17. A method for forming a semiconductor device comprising:
providing a semiconductor body comprising a first surface, a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region and the second semiconductor region forming a pn-junction;
forming a trench such that the trench extends from the first surface into the semiconductor body and comprises, in a horizontal plane substantially parallel to the first surface, a first trench portion and second trench portion;
forming an insulating layer on a sidewall of the first trench portion so that the insulating layer adjoins the first semiconductor region and the second semiconductor region;
forming a gate electrode in the first trench portion;
forming a conductive plug in the second trench portion such that the conductive plug is connected with the second semiconductor region; and
forming a source metallization on the first

Assignees

• Infineon Technologies Austria

Inventors

• Hirler Franz

Classifications

• H10P30/222

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10D64/667

  the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671) · CPC title

• H10D64/665

  the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671) · CPC title

• H10D64/516

  the thicknesses being non-uniform · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title