Reduction of oxide recesses for gate height control

Patent metadata

Field	Value
Publication number	US-9257516-B2
Application number	US-201414505582-A
Country	US
Kind code	B2
Filing date	Oct 3, 2014
Priority date	May 17, 2013
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

An intermediate semiconductor structure in fabrication includes a substrate. A plurality of gate structures is disposed over the substrate, with at least two of the gate structures separated by a sacrificial material between adjacent gate structures. A portion of the sacrificial material is removed to form openings within the sacrificial material, which are filled with a filler material having a high aspect ratio oxide. The excess filler material is removed. A portion of the gate structures is removed to form gate openings within the gate structures. The gate openings are filled with gate cap material and the excess gate cap material is removed to create a substantially planar surface overlaying the gate structures and the sacrificial material to control sacrificial oxide recess and gate height.

First claim

The invention claimed is:

1. A semiconductor device comprising:
at least one gate structure disposed over a substrate, the at least one gate structure comprising recessed, multiple gate layers disposed therein, and a gate cap disposed over the recessed, multiple gate layers;
a sacrificial material deposited adjacent to the at least one gate structure, the sacrificial material being recessed below an upper surface of the at least one gate structure;
a filler material disposed…

Assignees

• Globalfoundries Inc

Inventors

• Chen Tsung-Liang
• Tai Hsin-Neng
• Wang Huey-Ming

Classifications

• H10D64/01354

  Electricity · mapped topic

• H10D64/013

  Electricity · mapped topic

• H10D84/0135 Primary

  Electricity · mapped topic

• H10D84/83

  Electricity · mapped topic

• H10D84/038

  Electricity · mapped topic