Surface mount package for a semiconductor integrated device, related assembly and manufacturing process

US9257372B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9257372-B2
Application numberUS-201314032075-A
CountryUS
Kind codeB2
Filing dateSep 19, 2013
Priority dateSep 28, 2012
Publication dateFeb 9, 2016
Grant dateFeb 9, 2016

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package.

First claim

Opening claim text (preview).

The invention claimed is: 1. A surface mount package comprising: an encapsulation housing a die of semiconductor material, the encapsulation including a first surface that includes a recess having side surfaces and a bottom formed by the encapsulation, at least a portion of the recess being void to receive a coupling element of a circuit board; and electrical contact leads protruding from the encapsulation and configured to be coupled to contact pads of the first surface of the circuit board. 2. The package according to claim 1 , wherein when the package is mounted onto the first surface of the circuit board and the coupling element is received by the recess, an engagement between the recess and the coupling element restricts movement of the encapsulation. 3. The package according to claim 1 , wherein the recess has a depth along a direction transverse to the first surface between 50 μm and 150 μm. 4. The package according to claim 1 , wherein the recess is a first recess and the coupling element is a first coupling element, the package further comprising a second recess, the second recess being configured to receive a second coupling element of the first surface of the circuit board. 5. The package according to claim 4 , wherein the encapsulation has a generically rectangular shape in plan view, with major sides from which the electrical contact leads protrude and minor sides; wherein the first and second recesses are arranged at minor sides, respectively. 6. The package according to claim 5 , wherein the first and second recesses are arranged at a middle of said minor sides, respectively. 7. The package according to claim 1 , further comprising a die pad housed within said encapsulation and supporting the die. 8. The package according to claim 1 , wherein the die is an accelerometer. 9. The package according to claim 1 , wherein the package is a gull-wing leaded type package. 10. A process comprising: providing electrical contact leads configured to be electrically coupled to contact pads of a circuit board; and forming an encapsulation housing a die of semiconductor material and a portion of the electrical contact leads, the encapsulation having a recess that includes side surfaces and a bottom delimited by the encapsulation, the recess being at least partially void to receive a coupling element of a circuit board. 11. The process according to claim 10 , wherein forming an encapsulation comprises allowing encapsulation material to flow around a protrusion in a surface of a mold that comprises the die and the portion of the electrical contact leads and forms the recess in the encapsulation. 12. The process according to claim 11 , wherein forming an encapsulation comprises injecting encapsulation material into a mold moving an ejector pin that pushes some of the encapsulation material away from a surface of the mold and forms a recess that is the coupling element. 13. The process according to claim 10 further including coupling the electrical contact leads to contact pads of the circuit board, the coupling element extending into the recess of the encapsulation. 14. The process according to claim 13 , further comprising coupling the encapsulation to the coupling feature of the circuit board, wherein the coupling comprises: depositing solder material on a first surface of the circuit board; positioning the encapsulation over the solder material on the first surface of the circuit board with the solder material in the recess; reflowing the solder material and adhering said solder material to the encapsulation in the recess. 15. The process according to claim 10 wherein the encapsulation comprises a plurality of recesses in the encapsulation. 16. The process according to claim 10 wherein the die is an accelerometer.

Assignees

Inventors

Classifications

  • characterised by their shape or disposition · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • G01P1/023Primary

    for acceleration measuring devices · CPC title

  • using moulds · CPC title

  • comprising copper [Cu] · CPC title

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Frequently asked questions

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What does patent US9257372B2 cover?
A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed …
Who is the assignee on this patent?
Stmicroelectronics Malta Ltd, St Microelectronics Pte Ltd, Stmicroelectronics Mala Ltd
What technology area does this patent fall under?
Primary CPC classification G01P1/023. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 09 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).