Code generation method, and information processing apparatus

Patent metadata

Field	Value
Publication number	US-9256437-B2
Application number	US-201313783906-A
Country	US
Kind code	B2
Filing date	Mar 4, 2013
Priority date	Mar 29, 2012
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

A computer-readable recording medium having stored therein a program for causing a computer to execute a digital signature process includes determining that a first specific instruction for executing parallel calculations of the same type, each calculation operating on a different piece of data, is generated by combining first and second instructions included in a first code, retrieving, from the first code, a third instruction for calculating data referenced by the first instruction and a fourth instruction for calculating data referenced by the second instruction, and selecting the third and fourth instructions as candidates of instructions to be combined with each other preferentially to generate a second specific instruction which is different from the first specific instruction.

First claim

What is claimed is:

1. A code generation method, comprising:
determining that a first specific instruction for executing parallel calculations of the same type, each calculation operating on a different piece of data, is generated by combining first and second instructions included in a first code, the first specific instruction using a first register to store the different pieces of data;
retrieving, from the first code by tracing the first code from the first and second instructions to a beginning, a third instruction for calculating data referenced by the first instruction and a fourth instruction for calculating data referenced by the second instruction;
selecting the third and fourth instructions as candidates of instructions to be combined with each other to generate a second specific instruction, which is different from the first specific instruction and is to be executed before the first specific instruction, the second specific instruction using a second register to store an execution result of the second specific instruction;
determining whether to combine the third and fourth instructions to generate the second specific instruction by determining whether data included in the second register is to be transferred to the first register when the first specific instruction is to be executed after execution of the second specific instruction; and
determining a combination of the first and second instructions by scanning an instruction queue included in the first code from the end to the beginning of the instruction queue.

2. A non-transitory computer-readable recording medium having stored therein a program for causing a computer to execute a process comprising:
determining that a first specific instruction for executing parallel calculations of the same type, each calculation operating on a different piece of data, is generated by combining first and second instructions included in a first code, the first specific instruction using a first register to store the different pieces of data;
retrieving, from the first code by tracing the first code from the first and second instructions to a beginning, a third instruction for calculating data referenced by the first instruction and a fourth instruction for calculating data referenced by the second instruction;
selecting the third and fourth instructions as candidates of instructions to be combined with each other to generate a second specific instruction, which is different from the first specific instruction and is to be executed before the first specific instruction, the second specific instruction using a second register to store an execution result of the second specific instruction;
determining whether to combine the third and fourth instructions to generate the second specific instruction by determining whether data included in the second register is to be transferred to the first register when the first specific instruction is to be executed after execution of the second specific instruction; and
determining a combination of the first and second instructions by scanning an instruction queue included in the first code from the end to the beginning of the instruction queue.

3. An information processing apparatus comprising:
a memory which stores a program; and
a processor which executes, based on the program, a process including:
determining that a first specific instruction for executing parallel calculations of the same type, each calculation operating on a different piece of data, is generated by combining first and second instructions included in a first code, the first specific instruction using a first register to store the different pieces of data,
retrieving, from the first code by tracing the first code from the first and second instructions to a beginning, a third instruction for calculating data referenced by the first instruction and a fourth instruction for calculating data referenced by the second instruction,
selecting the third and fourth instructions as candidates of instructions to be combined with each other to generate a second specific instruction, which is different from the first specific instruction and is to be executed before the first specific instruction, the second specific instruction using a second register to store an execution result of the second specific instruction,
determining whether to combine the third and fourth instructions to generate the second specific instruction by determining whether data included in the second register is to be transferred to the first register when the first specific instruction is to be executed after execution of the second specific instruction, and
determining a combination of the first and second instructions by scanning an instruction queue included in the first code from the end to the beginning of the instruction queue.

Assignees

• Fujitsu Ltd

Inventors

• Arakawa Takashi
• Chiba Shuichi

Classifications

• G06F8/41

  Compilation · CPC title

• G06F9/3887 Primary

  controlled by a single instruction for multiple data lanes [SIMD] · CPC title

• G06F9/3851 Primary

  from multiple instruction streams, e.g. multistreaming · CPC title