Electronic component built-in multi-layer wiring board and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9253882-B2
Application number	US-201414451215-A
Country	US
Kind code	B2
Filing date	Aug 4, 2014
Priority date	Aug 5, 2013
Publication date	Feb 2, 2016
Grant date	Feb 2, 2016

Abstract

An electronic component built-in multi-layer wiring board that comprises collectively stacked therein a plurality of first printed wiring boards by thermal compression bonding, and that comprises an electronic component package built in thereto, wherein the electronic component package comprises a first electronic component built in thereto and a plurality of second printed wiring boards stacked to have electrodes on an outermost surface of the package at a pitch that is wider than the electrode pitch of the first electronic component and that is matched to the wiring pitch of the first printed wiring boards, the electronic component built-in multi-layer wiring board includes a second electronic component having a thickness which is greater than that of the first electronic component, and the electronic component package having a thickness which is 80% to 125% of the thickness of the second electronic component.

First claim

What is claimed is:

1. An electronic component built-in multi-layer wiring board that comprises collectively stacked therein a plurality of first printed wiring boards by thermal compression bonding, and that comprises an electronic component package built in thereto, wherein
the electronic component package comprises a first electronic component built in thereto and a plurality of second printed wiring boards stacked to have first electrodes on an outermost surface of the package, the first electronic component including second electrodes, wherein a pitch of adjacent electrodes of the first electrodes is wider than a pitch of adjacent electrodes of the second electrodes of the first electronic component and the pitch of the adjacent electrodes of the first electrodes is matched to a wiring pitch of the first printed wiring boards, the first electrodes being connected to the second electrodes in one-to-one correspondence,
the electronic component built-in multi-layer wiring board includes a second electronic component having a thickness which is greater than that of the first electronic component, and
further comprising a third electronic component different from the first and second electronic components, the third electronic component being surface-mounted immediately above or below the built-in location of the electronic component package with electrodes of the third electronic component formed at a pitch matched to the wiring pitch of the first printed wiring board being connected to the electrodes of the electronic component package by an electrically shortest path.

2. The electronic component built-in multi-layer wiring board according to claim 1 , wherein
the electronic component package comprises, in the second printed wiring boards:
a first-layer wiring board disposed on a rear surface side which is an opposite side to the electrode formation surface side of the first electronic component;
a second-layer wiring board having formed therein an opening where the first electronic component is built;
a third-layer wiring board comprising conductive paste vias formed therein at a pitch matched to the electrode pitch of the first electronic component, and electrodes formed on one surface thereof, the electrodes enlarging the pitch from the electrode pitch of the first electronic component to the wiring pitch of the first printed wiring board; and
a fourth-layer wiring board comprising electrodes formed on one surface thereof at a pitch matched to the wiring pitch of the first printed wiring board and conductive paste vias formed therein,
the first-layer to forth-layer wiring boards are collectively stacked with the first electronic component built in to the opening of the second-layer wiring board with the conductive paste vias in the third-layer wiring board being opposed to the electrodes of the first electronic component, and with the conductive paste vias in the fourth-layer wiring board being disposed opposed to the electrodes of the third-layer wiring board.

3. The electronic component built-in multi-layer wiring board according to claim 1 , wherein
the second printed wiring board is formed by an identical material to that of the first printed wiring board.

4. The electronic component built-in multi-layer wiring board according to claim 1 , wherein
a certain first printed wiring board of a plurality of first printed wiring boards disposed in an interlayer of the electronic component built-in multi-layer wiring board has formed therein openings capable of mounting the second electronic component and the electronic component package, respectively, and
with the second electronic component and the electronic component package being mounted in the respective openings, the first printed wiring boards are collectively stacked.

5. A method of manufacturing an electronic component built-in multi-layer wiring board, the electronic component built-in multi-layer wiring board comprising collectively stacked therein a plurality of first printed wiring boards by thermal compression bonding, and the electronic component built-in multi-layer wiring board comprising an electronic component package built in thereto, the method comprising the steps of:
forming the electronic component package by providing a first electronic component to be built in the package and by stacking a plurality of second printed wiring boards to have first electrodes on an outermost surface of the package, the first electronic component including second electrodes, wherein a pitch of adjacent electrodes of the first electrodes is wider than a pitch of adjacent electrodes of the second electrodes of the first electronic component and the pitch of the adjacent electrodes of the first electrodes is matched to a wiring pitch of the first printed wiring boards, the first electrodes being connected to the second electrodes in one-to-one correspondence,
forming in a certain first printed wiring board of the plurality of first printed wiring boards openings capable of mounting a second electronic component having a thickness which is greater than that of the first electronic component and the electronic component package, respectively, and stacking, with the second electronic component and the electronic component package being mounted in the respective openings, the first printed wiring boards to close the openings, and
providing a third electronic component different from the first and second electronic components, the third electronic component being surface-mounted immediately above or below the built-in location of the electronic component package with electrodes of the third electronic component formed at a pitch matched to the wiring pitch of the first printed wiring board being connected to the electrodes of the electronic component package by an electrically shortest path.

6. A method of manufacturing an electronic component built-in multi-layer wiring board according to claim 5 , wherein
the step of forming the electronic component package comprising collectively stacking, in the second printed wiring boards,
a first-layer wiring board disposed on a rear surface side which is an opposite side to the electrode formation surface side of the first electronic component;
a second-layer wiring board having formed therein an opening where the first electronic component is built;
a third-layer wiring board comprising conductive paste vias formed therein at a pitch matched to the electrode pitch of the first electronic component, and electrodes formed on one surface thereof, the electrodes enlarging the pitch from the electrode pitch of the first electronic component to the wiring pitch of the first printed wiring board; and
a fourth-layer wiring board comprising electrodes formed on one surface thereof at a pitch matched to the wiring pitch of the first printed wiring board and conductive paste vias formed therein,
the collectively stacking being carried out with the first electronic component being built in to the opening of the second-layer wiring board with the conductive paste vias in the third-layer wiring board being opposed to the electrodes of the first electronic component, and with the conductive paste vias in the fourth-layer wiring board being disposed opposed to the electrodes of the third-layer wiring board.

Assignees

• Fujikura Ltd

Inventors

• Nanjo Hirokazu

Classifications

• H10W72/9413

  on encapsulations · CPC title

• H10W70/614

  the multiple chips being integrally enclosed · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W70/099

  Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers · CPC title

• H10W72/073

  of die-attach connectors · CPC title