Instruction for performing a pseudorandom number generate operation

Patent metadata

Field	Value
Publication number	US-9252953-B2
Application number	US-201414519621-A
Country	US
Kind code	B2
Filing date	Oct 21, 2014
Priority date	Mar 14, 2013
Publication date	Feb 2, 2016
Grant date	Feb 2, 2016

Abstract

A machine instruction is provided that includes an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation, and a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used. The machine instruction is executed, and execution includes for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

First claim

What is claimed is:

1. A computer program product for executing a machine instruction, the computer program product comprising:
a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation; and
a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used by the machine instruction; and
executing the machine instruction, the executing comprising:
obtaining a modifier (M) field associated with the machine instruction;
based on the M field having a first value, performing a deterministic pseudorandom number generate operation, the deterministic pseudorandom number generate operation comprising:
for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and
storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

2. The computer program product of claim 1 , wherein the machine instruction further comprises another register field to be used to identify another register, the another register to specify a location in memory of a second operand to be used by the machine instruction, and wherein the method further comprises:
executing the machine instruction another time, the executing the machine instruction another time comprising:
based on the M field having a second value, performing a deterministic pseudorandom number seed operation, the deterministic pseudorandom number seed operation comprising:
obtaining seed material based on information included in the second operand;
using the 512 bit secure hash technique and the seed material to provide one or more seed values; and
storing the one or more seed values in the parameter block associated with the machine instruction.

3. The computer program product of claim 1 , wherein the executing further comprises obtaining a function code associated with the machine instruction, the function code to specify a function to be performed, and based on the function code being a particular value, obtaining the modifier field.

4. The computer program product of claim 1 , wherein the parameter block is configured to include a reseed counter to indicate a number of times the machine instruction has completed with a specific condition code since the parameter block was last instantiated or reseeded; a stream bytes field to track a number of bytes stored based on the generate operation; a value to indicate an internal state of a random number generator represented by the parameter block; and a constant value to be initialized by execution of a seed operation.

5. The computer program product of claim 1 , wherein the storing comprises storing right to left in the first operand.

6. The computer program product of claim 1 , wherein for a block of memory of the one or more blocks of memory, the generating the generated hash value comprises:
adding a seed value of the at least one seed value of the parameter block and a block number of the block of memory being processed to provide a sum;
combining the sum with padding to provide input; and
using the input and the 512 bit secure hash technique to provide the generated hash value.

7. The computer program product of claim 6 , wherein the generating comprises generating the generated hash value for a number of blocks of memory, the number of blocks of memory determined based on a length of the first operand, and starting with a rightmost block of memory.

8. The computer program product of claim 1 , wherein the storing for one generated hash value comprises:
determining whether a length of the first operand as indicated in a selected register of the machine instruction is a multiple of a defined number;
based on the length being a multiple of the defined number, storing the one generated hash value in the corresponding block of memory of the first operand; and
based on the length not being a multiple of the defined number, storing a portion of the one generated hash value in the corresponding block of memory of the first operand.

9. The computer program product of claim 8 , wherein the portion comprises a leftmost number of bytes of the one generated hash value.

10. The computer program product of claim 8 , wherein the method further comprises:
based on the storing, adjusting the length of the first operand based on a number of bytes stored in the first operand; and
updating a stream bytes field of the parameter block based on a number of bytes stored in the first operand.

11. A computer system for executing a machine instruction, the computer system comprising:
a memory; and
a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation; and
a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used by the machine instruction; and

executing the machine instruction, the executing comprising:
obtaining a modifier (M) field associated with the machine instruction;
based on the M field having a first value, performing a deterministic pseudorandom number generate operation, the deterministic pseudorandom number generate operation comprising:
for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and
storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.

12. The computer system of claim 11 , wherein the machine instruction further comprises another register field to be used to identify another register, the another register to specify a location in memory of a second operand to be used by the machine instruction, and wherein the method further comprises:
executing the machine instruction another time, the executing the machine instruction another time comprising:
based on the M field having a second value, performing a deterministic pseudorandom number seed operation, the deterministic pseudorandom number seed operation comprising:
obtaining seed material based on information included in the second operand;
using the 512 bit secure hash technique and the seed material to provide one or more seed values; and
storing the one or more seed values in the parameter block associated with the machine instruction.

13. The computer system of claim 11 , wherein the executing further comprises obtaining a function code associated with the machine instruction, the function code to specify a function to be performed, and based on the function code being a particular va

Assignees

• IBM

Inventors

• Greiner Dan F
• Nerz Bernd
• Visegrady Tamas

Classifications

• H04L9/0643 Primary

  Hash functions, e.g. MD5, SHA, HMAC or f9 MAC · CPC title

• G06F9/3001

  Arithmetic instructions · CPC title

• H04L9/0662

  with particular pseudorandom sequence generator · CPC title

• H04L9/0869 Primary

  involving random numbers or seeds · CPC title

• H04L2209/24

  Key scheduling, i.e. generating round keys or sub-keys for block encryption · CPC title